-
公开(公告)号：US20230244490A1
公开(公告)日：2023-08-03
申请号：US17588315
申请日：2022-01-30
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
CPC classification number: G06F9/3836 , G06F9/30145
Abstract: A processor includes a time counter and provides a method for statically dispatching instructions with preset execution times based on a time count from the time counter provided to an execution pipeline.
-
公开(公告)号：US12288065B2
公开(公告)日：2025-04-29
申请号：US17733689
申请日：2022-04-29
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
Abstract: A processor includes a plurality of register sets of a register file, and a plurality sets of functional units which are coupled by sets of dedicated read and write buses to allow parallel execution of instruction. The register sets and functional units are organized as odd and even sets. Shared buses may also be employed. The processor may also include a time counter and a time-resource matrix and provides a method for statically dispatching instructions.
-
公开(公告)号：US12282772B2
公开(公告)日：2025-04-22
申请号：US18217368
申请日：2023-06-30
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
Abstract: A processor includes a time counter, a vector coprocessor, and a vector data buffer for executing vector load and store instructions. The processor handles unit, stride or indices of data elements of a vector register. The vector data buffer includes crossbar switches for coupling between a plurality of data elements of a vector register and a plurality of data banks of the vector data buffer.
-
公开(公告)号：US12190116B2
公开(公告)日：2025-01-07
申请号：US17713569
申请日：2022-04-05
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
IPC: G06F9/38
Abstract: A processor includes a time counter and a time-resource matrix and provides a method for statically dispatching instructions if the resources are available based on data stored in the time-resource matrix, and wherein execution times for the instructions use a time count from the time counter to specify when the instructions may be provided to an execution pipeline. The execution times are based on fixed latency times of instructions with exception of the load instruction which is based on the data cache hit latency time. A data cache miss causes the load instruction and subsequent dependent instructions to be statically replayed at a later time using the same time count.
-
公开(公告)号：US12169716B2
公开(公告)日：2024-12-17
申请号：US17725476
申请日：2022-04-20
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
Abstract: A processor includes a time counter and a register scoreboard and provides a method for statically dispatching custom or extended instructions with preset execution times based on a write time of a register in the register scoreboard and the time counter provided to an execution pipeline.
-
公开(公告)号：US12124849B2
公开(公告)日：2024-10-22
申请号：US18202928
申请日：2023-05-28
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
CPC classification number: G06F9/30036 , G06F9/3856
Abstract: A processor includes a time counter, a vector coprocessor, and an extended vector register file for executing vector instructions and extending the data width of vector registers. The processor statically dispatches vector instructions with preset execution times based on a write time of a register in a coprocessor register scoreboard and a time counter provided to a vector execution pipeline.
-
公开(公告)号：US12112172B2
公开(公告)日：2024-10-08
申请号：US17829909
申请日：2022-06-01
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
CPC classification number: G06F9/3836 , G06F1/10 , G06F9/30036 , G06F9/3838 , G06F9/3877
Abstract: A processor includes a time counter and a vector coprocessor for executing vector instructions and providing a method for statically dispatching vector instructions with preset execution times based on a write time of a register in a coprocessor register scoreboard and a time counter provided to a vector execution pipeline.
-
公开(公告)号：US20240020120A1
公开(公告)日：2024-01-18
申请号：US18217368
申请日：2023-06-30
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
CPC classification number: G06F9/30036 , G06F9/3856 , G06F9/3816
Abstract: A processor includes a time counter, a vector coprocessor, and a vector data buffer for executing vector load and store instructions. The processor handles unit, stride or indices of data elements of a vector register. The vector data buffer includes crossbar switches for coupling between a plurality of data elements of a vector register and a plurality of data banks of the vector data buffer.
-
公开(公告)号：US20240020119A1
公开(公告)日：2024-01-18
申请号：US18202928
申请日：2023-05-28
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
CPC classification number: G06F9/30036 , G06F9/3856
Abstract: A processor includes a time counter, a vector coprocessor, and an extended vector register file for executing vector instructions and extending the data width of vector registers. The processor statically dispatches vector instructions with preset execution times based on a write time of a register in a coprocessor register scoreboard and a time counter provided to a vector execution pipeline.
-
30.发明授权
公开(公告)号：US11829762B2
公开(公告)日：2023-11-28
申请号：US17697865
申请日：2022-03-17
Applicant: Simplex Micro, Inc.
Inventor： Thang Minh Tran
CPC classification number: G06F9/321 , G06F9/30145 , G06F9/3838 , G06F9/5038
Abstract: A processor includes a time counter and a time-resource matrix and provides a method for statically dispatching instructions if the resources are available based on data stored in the time-resource matrix, and wherein execution times for the instructions use a time count from the time counter to specify when the instructions may be provided to an execution pipeline.
