公开(公告)号：US09978328B2

公开(公告)日：2018-05-22

申请号：US15019741

申请日：2016-02-09

Applicant: Samsung Display Co., Ltd.

Inventor： Sehyoung Cho ,  Kyunghoon Kim ,  Dongwoo Kim ,  Ilgon Kim ,  Kangmoon Jo ,  Hyunjoon Kim

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2310/0286

Abstract: There is provided a scan driver. The scan driver includes stages. An ith (i is a natural number) stage circuit includes an output unit, a controller configured to control the voltage of the second node in response to a kth (k is a natural number) clock signal supplied to a second input terminal, and an input unit configured to control the voltages of the first node and the second node in response to a carry signal of a previous stage that is supplied to a third input terminal and a carry signal of at least one next stage. The kth clock signal maintains a gate on voltage at a point of time at which a voltage of the jth clock signal is changed to a gate on voltage.