公开(公告)号：US4725748A

公开(公告)日：1988-02-16

申请号：US909139

申请日：1986-09-19

申请人： Raymond Hayes ,  Joseph R. Peter

发明人： Raymond Hayes ,  Joseph R. Peter

IPC分类号： G01R13/34 ,  H03K5/159 ,  G11C11/34

CPC分类号： G01R13/345

摘要： A charge coupled device (CCD) analog shift register in a two-channel serial-parallel-serial (SPS) structure operating in a fast-in/slow-out (FISO) mode for high speed signal acquisition and temporary storage of a plurality of samples. The two CCD arrays are clocked simultaneously, and the input analog signal is demultiplexed to the two arrays. Additional transfer electrodes are provided at the input of one of the arrays, and the other array is provided with a sampling clock which is 180.degree. out of phase with the sampling clock of the first array; two consecutive samples of the input signal are taken during each transfer clock cycle. All signal samples are clocked through the arrays simultaneously and appear at the output at the same time.

摘要翻译： 一种双通道串行 - 并行串行（SPS）结构中的电荷耦合器件（CCD）模拟移位寄存器，其以快速/慢速（FISO）模式工作，用于高速信号采集和临时存储多个 样品。 两个CCD阵列同时计时，并将输入的模拟信号解复用为两个阵列。 在其中一个阵列的输入处提供附加的传输电极，另一个阵列设置有与第一阵列的采样时钟相差180度的采样时钟; 在每个传送时钟周期期间，输入信号的两个连续采样。 所有信号采样同时通过阵列计时，同时出现在输出端。