MALWARE IDENTIFICATION
    21.
    发明申请

    公开(公告)号:US20220391507A1

    公开(公告)日:2022-12-08

    申请号:US17761646

    申请日:2019-10-25

    Abstract: In an example there is provided an apparatus for a computing system. The apparatus comprises a central processing unit (CPU) and at least one further hardware component. The apparatus comprises a probe communicatively coupled with the hardware component and the CPU, to intercept communication between the hardware component and CPU and an inspection module communicatively coupled to the probe, to access communication data intercepted at the probe relating to communication between the hardware component and CPU determine a state of a process executing on the CPU, on the basis of the communication data and apply a model to the state to infer malicious activity on the CPU.

    Active testing of access control policy

    公开(公告)号:US11449618B2

    公开(公告)日:2022-09-20

    申请号:US17047030

    申请日:2019-08-06

    Abstract: A method is provided, comprising actively testing the access control policy of a software target using a probing logic. The method further comprises determining whether an intrusion in the software target has occurred based on monitored side effects. According to the method, the probing logic is to execute at least one operation that is forbidden by the access control policy. The probing logic is further to create at least one predetermined observable side effect based on the successful execution of the operation.

    EXECUTING SOTWARE
    25.
    发明申请

    公开(公告)号:US20210326443A1

    公开(公告)日:2021-10-21

    申请号:US16604161

    申请日:2018-05-02

    Abstract: An example method is disclosed, for example a method of executing a software module in a computing system, the method comprising executing, in a first processing device of the computing system, a first software module to verify a second software module and to cause a second processing device of the computing system to execute the second software module, executing, in the second processing device, the second software module to execute, in the second processing device, a third software module and to provide a first key of a key pair to the third software module, and protecting, by the second processing device, a memory space associated with the third software module, wherein the memory space contains the first key of the key pair, wherein the first processing device contains a second key of the key pair.

    INTEGRATED CIRCUIT(S) WITH ANTI-GLITCH CANARY CIRCUIT(S)

    公开(公告)号:US20210312092A1

    公开(公告)日:2021-10-07

    申请号:US17058152

    申请日:2018-10-25

    Abstract: An IC comprising functional circuit to perform primary functions of the IC is provided. The functional circuit is to enable electrical signals to propagate through it within a timing constraint of the functional circuit. The IC comprises at least one canary circuit used for detecting glitch attacks on the circuit. Electrical signals are to propagate through the canary circuit(s) within a defined timing constraint of the canary circuit(s). The canary circuit is to provide a signal path designed such that in the event of a timing constraint of the functional circuit(s) is violated due to a glitch attack, also the timing constraint of the canary circuit(s) is violated.

    Executing software
    30.
    发明授权

    公开(公告)号:US11615188B2

    公开(公告)日:2023-03-28

    申请号:US16604161

    申请日:2018-05-02

    Abstract: An example method is disclosed, for example a method of executing a software module in a computing system, the method comprising executing, in a first processing device of the computing system, a first software module to verify a second software module and to cause a second processing device of the computing system to execute the second software module, executing, in the second processing device, the second software module to execute, in the second processing device, a third software module and to provide a first key of a key pair to the third software module, and protecting, by the second processing device, a memory space associated with the third software module, wherein the memory space contains the first key of the key pair, wherein the first processing device contains a second key of the key pair.

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