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公开(公告)号:US20150028469A1
公开(公告)日:2015-01-29
申请号:US13950736
申请日:2013-07-25
Applicant: General Electric Company
Inventor: Avinash Srikrishnan Kashyap , Peter Micah Sandvik , Rui Zhou , Peter Almern Losee
CPC classification number: H01L27/0248 , H01L2924/0002
Abstract: A monolithically integrated semiconductor assembly is presented. The semiconductor assembly includes a substrate including silicon (Si), and gallium nitride (GaN) semiconductor device is fabricated on the substrate. The semiconductor assembly further includes at least one transient voltage suppressor (TVS) structure fabricated in or on the substrate, wherein the TVS structure is in electrical contact with the GaN semiconductor device. The TVS structure is configured to operate in a punch-through mode, an avalanche mode, or combinations thereof, when an applied voltage across the GaN semiconductor device is greater than a threshold voltage. Methods of making a monolithically integrated semiconductor assembly are also presented.
Abstract translation: 提出了一种单片集成半导体组件。 半导体组件包括包括硅(Si)的衬底,并且在衬底上制造氮化镓(GaN)半导体器件。 半导体组件还包括在衬底中或衬底上制造的至少一个瞬态电压抑制器(TVS)结构,其中TVS结构与GaN半导体器件电接触。 当跨越GaN半导体器件的施加电压大于阈值电压时,TVS结构被配置为以穿通模式,雪崩模式或其组合工作。 还提出了制造单片集成半导体组件的方法。