公开(公告)号：US20230005910A1

公开(公告)日：2023-01-05

申请号：US17694192

申请日：2022-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junmo Park ,  Yeonho Park ,  Kyubong Choi ,  Cheol Kim ,  Junseok Lee ,  Jinseok Lee

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/417 ,  H01L29/786 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/66

Abstract: A semiconductor memory device includes: a substrate having a first channel structure and a second channel structure respectively extending in a first direction and arranged in a second direction perpendicular to the first direction; a first gate structure disposed on the first channel structure and extending in the second direction on the substrate; a second gate structure disposed on the second channel structure and extending in the second direction; first source/drain regions respectively disposed on opposite sides of the first gate structure; second source/drain regions respectively disposed on opposite sides of the second gate structure; a gate separation pattern disposed between the first and second gate structures and having an upper surface at a level lower than that of an upper surface of each of the first and second gate structures, the gate separation pattern including a first insulating material; and a gate capping layer disposed on the first and second gate structures and having an extension portion extending between the first and second gate structures to be connected to the gate separation pattern, the gate capping layer including a second insulating material different from the first insulating material.