MODULAR NON-VOLATILE FLASH MEMORY BLADE
    11.
    发明申请
    MODULAR NON-VOLATILE FLASH MEMORY BLADE 审中-公开
    模块式非易失性闪存存储器刀片

    公开(公告)号:US20160255740A1

    公开(公告)日:2016-09-01

    申请号:US14918554

    申请日:2015-10-20

    Abstract: Embodiments of the inventive concept include Open Cloud Server (OCS)-compliant and other enterprise servers having high-density modular non-volatile flash memory blades and associated multi-card modules. A modular non-volatile flash memory blade can be seated within a 1U tray. The flash memory blade can include a server motherboard and multiple non-volatile flash memory blade multi-card modules. Each of the multi-card modules can include a printed circuit board, a switch coupled to the printed circuit board, a module power port, an input/output port, and riser card slots to receive solid state drive riser cards. The solid state drive riser cards can be seated within a corresponding riser card slot of the multi-card modules, and can each include multiple solid state drive chips. The server motherboard can communicate with the solid state drive chips via the cable connector riser cards and associated cables. The switch can expand each upstream port to multiple downstream ports associate with the solid state drive chips.

    Abstract translation: 本发明构思的实施例包括具有高密度模块化非易失性闪速存储器刀片和相关联的多卡模块的Open Cloud Server(OCS)兼容性和其他企业级服务器。 模块化非易失性闪存刀片可以安装在1U托盘内。 闪存刀片可以包括服务器主板和多个非易失性闪存刀片多卡模块。 每个多卡模块可以包括印刷电路板,耦合到印刷电路板的开关,模块电源端口,输入/输出端口和转接卡插槽以接收固态驱动器转接卡。 固态驱动器提升卡可以位于多卡模块的对应的转接卡插槽内,并且可以分别包括多个固态驱动芯片。 服务器主板可以通过电缆连接器提升卡和相关电缆与固态驱动器芯片通信。 交换机可以将每个上游端口扩展到与固态驱动器芯片相关联的多个下游端口。

    NOVEL SSD ARCHITECTURE FOR FPGA BASED ACCELERATION

    公开(公告)号:US20190272241A1

    公开(公告)日:2019-09-05

    申请号:US16124179

    申请日:2018-09-06

    Abstract: A system is disclosed. The system may include a processor running an application program and a memory storing data being used by the application program. An upstream port enables communication with the processor; a downstream port enables communication with a storage device. The system may also include an acceleration module implemented using hardware and including an Acceleration Platform Manager (APM-F) to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a physical function (PF) to expose the storage device, a second function to expose the acceleration module, a controller to manage operations of the storage device, storage for application data for the application program, and a storage device Acceleration Platform Manager (APM-S) to assist the APM-F in executing the acceleration instruction. A downstream filter associated with the downstream port may intercept an acceleration instruction associated with a downstream Filter Address Range (FAR) received from the storage device and deliver the acceleration instruction to the APM-F, the acceleration instruction being. An upstream filter associated with the upstream port may intercept an acceleration instruction received from the processor and deliver the second acceleration instruction to the APM-F. The processor, the acceleration module, and the storage device may communicate via a Peripheral Component Interconnect Exchange (PCIe) bus. The acceleration module may support performing the acceleration instruction on the application data on the storage device for the application program without loading the application data into the memory.

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