公开(公告)号：US11099417B2

公开(公告)日：2021-08-24

申请号：US16739829

申请日：2020-01-10

Applicant: Samsung Display Co., Ltd.

Inventor： Minsu Lee ,  Wonjang Ki ,  Dae-Hyun Noh ,  Yongsung Park ,  Seungbin Lee

IPC: G02F1/1335 ,  H01L33/44 ,  G02B1/11 ,  G02F1/135

Abstract: An electronic apparatus including a base substrate that includes an active area and a peripheral area adjacent to the active area, a plurality of pixels that are disposed in the active area, a plurality of pads that are disposed in the peripheral area, fan-out lines that are disposed in the peripheral area and connect the pixels and the pads, and an anti-reflection layer that includes an active portion and a peripheral portion. The active portion overlaps the active area and includes a plurality of color patterns respectively overlapping the pixels, and the peripheral portion overlaps the peripheral area. The anti-reflection layer overlaps at least a part of the fan-out lines.

公开(公告)号：US09978311B2

公开(公告)日：2018-05-22

申请号：US14850601

申请日：2015-09-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Youngin Hwang ,  Jihye Kong ,  Yongsung Park ,  Inho Choi

IPC: G09G3/32 ,  G09G3/3258

CPC classification number: G09G3/3258 ,  G09G2230/00 ,  G09G2300/0819 ,  G09G2310/0251 ,  G09G2310/0262 ,  G09G2320/045

Abstract: A pixel circuit and a display apparatus. The pixel circuit includes a first transistor configured to output a driving current corresponding to a data voltage to an output node, an OLED connected to the output node and configured to emit light according to the driving current output from the first transistor, a storage capacitor coupled to the first transistor and configured to store the data voltage, a second transistor configured to receive a reference voltage from the first transistor during a first time section, configured to diode-connect the first transistor, and configured to compensate for a threshold voltage of the first transistor, and a third transistor configured to diode-connect the first transistor during a second time section, configured to receive the data voltage through the first transistor for which the threshold voltage of the first transistor is compensated, and configured to transfer the data voltage to the storage capacitor.