公开(公告)号：US10109252B2

公开(公告)日：2018-10-23

申请号：US15964249

申请日：2018-04-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Duc-han Cho ,  Beomjun Kim ,  Yoonho Kim ,  Noboru Takeuchi ,  Kangnam Kim

IPC: G09G3/36 ,  G11C19/18 ,  G11C19/28

Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.

公开(公告)号：US20180247603A1

公开(公告)日：2018-08-30

申请号：US15964249

申请日：2018-04-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Duc-han Cho ,  Beomjun Kim ,  Yoonho Kim ,  Noboru Takeuchi ,  Kangnam Kim

IPC: G09G3/36 ,  G11C19/28 ,  G11C19/18

CPC classification number: G09G3/3677 ,  G09G3/3614 ,  G11C19/184 ,  G11C19/28

Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.

公开(公告)号：US09934746B2

公开(公告)日：2018-04-03

申请号：US15012612

申请日：2016-02-01

Applicant: Samsung Display Co. Ltd.

Inventor： Noboru Takeuchi ,  Min Soo Kang ,  Beom Jun Kim ,  Yoon Ho Kim ,  Seong Yeol Syn ,  Hong Woo Lee

IPC: G11C19/00 ,  G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0289 ,  G09G2310/08 ,  G11C19/28

Abstract: A gate driving circuit is provided. A gate driving circuit comprises a pull-up control unit including a control transistor, a pull-up unit, a carry unit which outputs a clock signal into a kth carry signal and a pull-down unit which pulls down a control node to an off voltage, wherein the control transistor includes one electrode and the other electrode connected to the control node, the one electrode and the other electrode being disposed on a gate electrode such that the one electrode and the other electrode being insulated from the gate electrode, wherein the gate electrode and the other electrode are disposed not to be overlapped with each other, and a distance between an upper surface of the gate electrode and a lower surface of the one electrode is longer than that of the upper surface of the gate electrode and a lower surface of the other electrode.