公开(公告)号：US10248613B2

公开(公告)日：2019-04-02

申请号：US15402519

申请日：2017-01-10

Applicant: QUALCOMM Incorporated

Inventor： Yuval Corey Hershko ,  Lior Amarilio ,  Nir Strauss

IPC: G06F13/20 ,  G06F13/42

Abstract: Data bus activation in an electronic device is provided. In one aspect, a host circuit determines a cumulative potential representing a cumulative fractional bus activation vote on a data line(s) in the data bus. The host circuit activates the data bus when the cumulative potential is greater than a configurable bus activation threshold. In another aspect, a device circuit(s) determines a selected signal strength threshold that is less than determined signal strength of an incoming signal. Accordingly, the device circuit(s) asserts a fractional potential corresponding to the selected signal strength threshold on the data line(s) as a fractional bus activation vote in the cumulative fractional bus activation vote. By activating the data bus based on the cumulative fractional bus activation vote, the host circuit can support timely data bus activation while preventing the data bus from being falsely activated, thus improving robustness of data bus activation in the electronic device.

公开(公告)号：US20190155781A1

公开(公告)日：2019-05-23

申请号：US15819641

申请日：2017-11-21

Applicant: QUALCOMM Incorporated

Inventor： Lior Amarilio ,  Yuval Corey Hershko ,  Nir Strauss

IPC: G06F13/42 ,  G06F13/364 ,  G06F15/78

CPC classification number: G06F13/4291 ,  G06F1/3287 ,  G06F13/362 ,  G06F13/364 ,  G06F15/7807

Abstract: Systems and methods to transfer master duties to a slave on a communication bus are disclosed. A master of a communication bus determines that one or more slaves are capable of serving as a sub-master, including providing a clock signal and owning control information bits. Once that determination is made, the master may determine that processing within the master is not required for a particular activity on the bus. The master then alerts one such capable slave to prepare to assume sub-master duties. Once the slave confirms that the slave is ready to assume the sub-master duties, the master may transmit a handover frame on the bus, and the slave begins acting as a sub-master. The master may then enter a low-power state, which may promote power savings, reduce heat generation, and provide other advantages.

公开(公告)号：US20180196776A1

公开(公告)日：2018-07-12

申请号：US15402519

申请日：2017-01-10

Applicant: QUALCOMM Incorporated

Inventor： Yuval Corey Hershko ,  Lior Amarilio ,  Nir Strauss

IPC: G06F13/42

CPC classification number: G06F13/4291

Abstract: Data bus activation in an electronic device is provided. In one aspect, a host circuit determines a cumulative potential representing a cumulative fractional bus activation vote on a data line(s) in the data bus. The host circuit activates the data bus when the cumulative potential is greater than a configurable bus activation threshold. In another aspect, a device circuit(s) determines a selected signal strength threshold that is less than determined signal strength of an incoming signal. Accordingly, the device circuit(s) asserts a fractional potential corresponding to the selected signal strength threshold on the data line(s) as a fractional bus activation vote in the cumulative fractional bus activation vote. By activating the data bus based on the cumulative fractional bus activation vote, the host circuit can support timely data bus activation while preventing the data bus from being falsely activated, thus improving robustness of data bus activation in the electronic device.

公开(公告)号：US20150052266A1

公开(公告)日：2015-02-19

申请号：US14267983

申请日：2014-05-02

Applicant: QUALCOMM Incorporated

Inventor： Yuval Corey Hershko ,  Yoram Rimoni

IPC: G06F13/38

CPC classification number: H04L69/03 ,  G06F13/387 ,  G06F13/42 ,  G06F13/4265 ,  G06K7/0021 ,  G06K19/07 ,  H04W40/00 ,  H04W80/00

Abstract: M-PHY communications are provided over a mass storage-based interface. Related connectors, systems, and methods are also disclosed. In particular, embodiments of the present disclosure take the M-PHY standard compliant signals and direct them through a memory card compliant connector so as to allow two M-PHY standard compliant devices having memory card based connectors to communicate.

Abstract translation: M-PHY通信通过基于大容量存储的接口提供。 还公开了相关连接器，系统和方法。 特别地，本公开的实施例采用符合M-PHY标准的信号并且引导它们通过符合存储卡的连接器，以便允许具有基于存储卡的连接器的两个符合M-PHY标准的设备进行通信。

公开(公告)号：US20140136750A1

公开(公告)日：2014-05-15

申请号：US13678461

申请日：2012-11-15

Applicant: QUALCOMM INCORPORATED

Inventor： Yuval Corey Hershko ,  Yoram Rimoni

IPC: G06F13/40

CPC classification number: G06F13/4009 ,  G06F13/385

Abstract: Operating M-PHY communications protocol over a Serial Advanced Technology Attachment SATA-based interface and related devices, systems, and methods are disclosed. In one embodiment, the system operates the M-PHY communications over a SATA interface. Related cables, connectors, systems, and methods are also disclosed. In particular, embodiments of the present disclosure take the M-PHY standard compliant signals and direct them through a SATA compliant connector (and optionally cable) so as to allow two M-PHY standard compliant devices having SATA connectors to communicate.

Abstract translation: 通过串行高级技术附件操作M-PHY通信协议公开了基于SATA的接口及相关设备，系统和方法。 在一个实施例中，系统通过SATA接口操作M-PHY通信。 还公开了相关的电缆，连接器，系统和方法。 特别地，本公开的实施例采用符合M-PHY标准的信号，并将它们引导通过SATA兼容连接器（以及可选地电缆），以便允许具有SATA连接器的两个符合M-PHY标准的设备进行通信。