公开(公告)号：US20150016203A1

公开(公告)日：2015-01-15

申请号：US14148515

申请日：2014-01-06

Applicant: QUALCOMM Incorporated

Inventor： Deepti Vijayalakshmi SRIRAMAGIRI ,  Jungwon SUH ,  Xiangyu DONG

IPC: G11C11/406

CPC classification number: G11C11/40618 ,  G06F13/1636 ,  G11C11/40603 ,  G11C11/40611

Abstract: A method of refreshing a dynamic random access memory (DRAM) includes detecting an open page of the DRAM at a row of a DRAM bank within an open sub-array of the DRAM bank. The method also includes delaying issuance of a refresh command to a target refresh row of the DRAM bank when the target refresh row of the DRAM bank is within the open sub-array of the DRAM bank.

Abstract translation: 一种刷新动态随机存取存储器（DRAM）的方法包括：检测在DRAM存储体的开放子阵列内的DRAM存储体的行的DRAM的打开页面。 该方法还包括当DRAM存储体的目标刷新行位于DRAM存储体的打开子阵列内时，向DRAM存储体的目标刷新行延迟发出刷新命令。

公开(公告)号：US20140379978A1

公开(公告)日：2014-12-25

申请号：US14242769

申请日：2014-04-01

Applicant: QUALCOMM Incorporated

Inventor： Jung Pill KIM ,  Xiangyu DONG ,  Jungwon SUH

IPC: G11C11/401 ,  G11C11/406

CPC classification number: G11C11/40622 ,  G11C11/40615 ,  G11C2211/4061 ,  G11C2211/4065

Abstract: A memory refresh method within a memory controller includes checking a first retention state corresponding to a first memory address and a second retention state corresponding to a second memory address. The memory refresh method also includes performing a refresh operation on a row corresponding to the second memory address when the second retention state indicates a weak retention state. The first memory address corresponds to a refresh counter address, and the second memory address corresponds to a complementary address of the refresh counter address.

Abstract translation: 存储器控制器内的存储器刷新方法包括检查对应于第一存储器地址的第一保留状态和对应于第二存储器地址的第二保留状态。 所述存储器刷新方法还包括当所述第二保持状态指示弱保持状态时，对与所述第二存储器地址相对应的行执行刷新操作。 第一存储器地址对应于刷新计数器地址，并且第二存储器地址对应于刷新计数器地址的补充地址。