公开(公告)号：US20080128883A1

公开(公告)日：2008-06-05

申请号：US11950990

申请日：2007-12-05

Applicant: Jong-Joo LEE

Inventor： Jong-Joo LEE

IPC: H01L23/36

CPC classification number: H01L23/481 ,  H01L23/3128 ,  H01L25/18 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/15311

Abstract: Provided are a high I/O semiconductor chip package in which a processor and a memory device are connected to each other via through electrodes and a method of manufacturing the high I/O semiconductor chip package. The high I/O semiconductor chip package includes: a substrate comprising a plurality of first circuit patterns on a first surface and a plurality of second circuit patterns on a second surface; a first semiconductor chip comprising a plurality of memory devices arranged on the substrate, each memory device being arranged in a matrix in chip regions partitioned by a scribe region; a second semiconductor chip stacked on the first semiconductor chip; and a plurality of through electrodes arranged along peripheral portions of the memory devices and connecting the first and second semiconductor chips to the second circuit patterns of the substrate.

Abstract translation: 提供了一种高I / O半导体芯片封装，其中处理器和存储器件通过电极彼此连接，以及制造高I / O半导体芯片封装的方法。 高I ​​/ O半导体芯片封装包括：在第一表面上包括多个第一电路图案的基板和在第二表面上的多个第二电路图案; 第一半导体芯片，包括布置在所述基板上的多个存储器件，每个存储器件以矩阵布置在由划线区域分隔的芯片区域中; 堆叠在第一半导体芯片上的第二半导体芯片; 以及沿着存储装置的周边部分布置的多个通孔，并将第一和第二半导体芯片连接到基板的第二电路图案。

公开(公告)号：US20070164429A1

公开(公告)日：2007-07-19

申请号：US11424605

申请日：2006-06-16

Applicant: Jong-Joo LEE

Inventor： Jong-Joo LEE

IPC: H01L23/48

CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L23/66 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05548 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A package board is provided. The package board includes a board body having a front surface and a back surface. A first power pad, a first ground pad, a first signal pad, a first internal terminal pad and a second internal terminal pad are disposed on the front surface of the board body, and a second power pad, a second ground pad and a second signal pad are disposed on the back surface of the board body. The second power pad, the second ground pad and the second signal pad are electrically connected to the first power pad, the first ground pad and the first signal pad, respectively. An internal terminal interconnection is provided in a bulk region of the board body or on a surface of the board body. The internal terminal interconnection electrically connects the first internal terminal pad to the second internal terminal pad. A semiconductor package employing the package board is also provided.

Abstract translation: 提供一个包装板。 封装板包括具有前表面和后表面的板体。 第一电源焊盘，第一接地焊盘，第一信号焊盘，第一内部端子焊盘和第二内部端子焊盘设置在板主体的前表面上，第二电源焊盘，第二接地焊盘和第二焊盘 信号垫设置在板体的背面。 第二电源焊盘，第二接地焊盘和第二信号焊盘分别电连接到第一电源焊盘，第一接地焊盘和第一信号焊盘。 内部端子互连设置在电路板主体的主体区域或电路板主体的表面上。 内部端子互连将第一内部端子焊盘电连接到第二内部端子焊盘。 还提供了采用封装板的半导体封装。