Segment routing in MPLS network
    11.
    发明授权

    公开(公告)号:US11201820B2

    公开(公告)日:2021-12-14

    申请号:US16940323

    申请日:2020-07-27

    Abstract: Described herein are methods and devices (e.g., routers) for performing segment routing over a multiprotocol label switching (MPLS) network. A method can include a router of the MPLS network receiving a packet, and the router modifying the packet by adding a segment routing header (SRH) type MPLS extension header. The SRH type MPLS extension header includes one or more segment identifiers (SIDs) that collectively provide a SID list for use in segment routing. The method further comprises the router copying one of the one or more SIDs in the SRH type MPLS extension header to a top of an MPLS label stack, and the router forwarding the packet as modified to another router of the MPLS network based on the one of the one or more SIDs included in a label stack entry at the top of the MPLS label stack.

    Memory Scheduling Method and Memory Controller
    12.
    发明申请
    Memory Scheduling Method and Memory Controller 有权
    内存调度方法和内存控制器

    公开(公告)号:US20150067249A1

    公开(公告)日:2015-03-05

    申请号:US14538095

    申请日:2014-11-11

    CPC classification number: G11C11/40615 G06F13/1689

    Abstract: In a memory scheduling method, a memory controller writes a first group of first row strobe commands (ACTs) into a first memory. The first group of first ACTs includes multiple first ACTs and a periodic interval exists between two adjacent first ACTs written by the memory controller into the first memory. The memory controller writes operation commands that correspond to the first group of first ACTs into the first memory after writing the first group of first ACTs into the first memory. The memory controller writes second ACTs into a second memory in periodic intervals for writing the first group of first ACTs into the first memory and/or in periodic intervals for writing the operation commands that correspond to the first group of first ACTs. The memory controller writes operation commands that correspond to the second ACTs into the second memory.

    Abstract translation: 在存储器调度方法中,存储器控制器将第一组第一行选通命令(ACT)写入第一存储器。 第一组第一ACT包括多个第一ACT,并且在由存储器控制器写入第一存储器的两个相邻的第一ACT之间存在周期性间隔。 存储器控制器将第一组第一ACT写入第一存储器之后,将与第一组第一ACT对应的操作命令写入第一存储器。 存储器控制器以周期性间隔将第二ACT写入第二存储器,以将第一组第一ACT写入第一存储器和/或以周期性间隔写入与第一组ACT相对应的操作命令。 存储器控制器将对应于第二ACT的操作命令写入第二存储器。

    Domain Name System Services for Variable-Length Address Networks

    公开(公告)号:US20230083671A1

    公开(公告)日:2023-03-16

    申请号:US17991247

    申请日:2022-11-21

    Abstract: A DNS server comprises: a receiver configured to receive a registration request comprising a domain name, a local address, and a scope, the registration request requests registration of the domain name; a processor coupled to the receiver and configured to execute computer instructions that cause the processor to: assign an address to the domain name based on the local address and the scope, and generate a registration response comprising the address; and a transmitter coupled to the processor and configured to transmit the registration response towards an endpoint. The processor may be further configured to cache a correspondence among the domain name, the address, and the scope.

    ADAPTIVE IN-BAND NETWORK TELEMETRY FOR FULL NETWORK COVERAGE

    公开(公告)号:US20230017175A1

    公开(公告)日:2023-01-19

    申请号:US17935578

    申请日:2022-09-27

    Abstract: A mechanism for adaptively performing in-band network telemetry (INT) by a network controller is disclosed. The mechanism includes receiving one or more congestion indicators from a collector. An adjusted sampling rate is generated. The adjusted sampling rate is a specified rate of insertion of instruction headers for INT and is generated based on the congestion indicators. The adjusted sampling rate is transmitted to a head node, which is configured to perform INT via instruction header insertion into user packets.

    MPLS EXTENSION HEADERS IN MIXED NETWORKS

    公开(公告)号:US20210203599A1

    公开(公告)日:2021-07-01

    申请号:US17170318

    申请日:2021-02-08

    Abstract: A mixed Multiprotocol Label Switching (MPLS) network includes both extension header capable (EH capable) nodes and EH non-capable nodes. A first EH capable node receives advertised capabilities of a downstream node. These advertised capabilities indicate whether the downstream node is EH capable. The first EH capable node receives a packet to be transmitted to the downstream node via the MPLS network, and determines whether the packet includes an extension header (EH). The node inserts an EH label into an MPLS label stack of the packet after determining the advertised capabilities of the downstream node indicate that the downstream node is EH capable, and after determining the packet does not include the EH.

    MPLS EXTENSION HEADERS FOR IN-NETWORK SERVICES

    公开(公告)号:US20210135986A1

    公开(公告)日:2021-05-06

    申请号:US17147208

    申请日:2021-01-12

    Abstract: Described herein are methods and devices (e.g., routers) that add in-network services to a multiprotocol label switching (MPLS) network. A method can include a router of the MPLS network receiving a packet and modifying the packet by adding one or more MPLS extension headers, adding a header of the extension header(s), and adding an indication within an MPLS label stack that one or more MPLS extension headers have been added to the packet. The method can also include the router forwarding the packet as modified to another router of the MPLS network. In certain embodiments, an extension header label (EHL) within a label value field of a label stack entry indicates that one or more MPLS extension headers have been added to the packet. In other embodiments, a forward equivalent class (FEC) indicates that one or more MPLS extension headers follow the MPLS label stack.

    Memory scheduling method and memory controller
    19.
    发明授权
    Memory scheduling method and memory controller 有权
    内存调度方法和内存控制器

    公开(公告)号:US09514799B2

    公开(公告)日:2016-12-06

    申请号:US14538095

    申请日:2014-11-11

    CPC classification number: G11C11/40615 G06F13/1689

    Abstract: In a memory scheduling method, a memory controller writes a first group of first row strobe commands (ACTs) into a first memory. The first group of first ACTs includes multiple first ACTs and a periodic interval exists between two adjacent first ACTs written by the memory controller into the first memory. The memory controller writes operation commands that correspond to the first group of first ACTs into the first memory after writing the first group of first ACTs into the first memory. The memory controller writes second ACTs into a second memory in periodic intervals for writing the first group of first ACTs into the first memory and/or in periodic intervals for writing the operation commands that correspond to the first group of first ACTs. The memory controller writes operation commands that correspond to the second ACTs into the second memory.

    Abstract translation: 在存储器调度方法中,存储器控制器将第一组第一行选通命令(ACT)写入第一存储器。 第一组第一ACT包括多个第一ACT,并且在由存储器控制器写入第一存储器的两个相邻的第一ACT之间存在周期性间隔。 存储器控制器将第一组第一ACT写入第一存储器之后,将与第一组第一ACT对应的操作命令写入第一存储器。 存储器控制器以周期性间隔将第二ACT写入第二存储器,以将第一组第一ACT写入第一存储器和/或以周期性间隔写入与第一组ACT相对应的操作命令。 存储器控制器将对应于第二ACT的操作命令写入第二存储器。

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