Method for selecting a ferrite bead for a filter
    11.
    发明申请
    Method for selecting a ferrite bead for a filter 失效
    用于选择过滤器的铁氧体磁珠的方法

    公开(公告)号:US20070220050A1

    公开(公告)日:2007-09-20

    申请号:US11525445

    申请日:2006-09-22

    CPC classification number: H03H1/0007 H03H2260/00

    Abstract: A method for selecting a ferrite bead for a filter to avoid a peak value in a frequency response curve of the filter is provided. The method includes the steps of: building an equivalent model database including parameters of equivalent models of ferrite beads, the parameters including an inductance and a capacitance of a corresponding equivalent model of each ferrite bead; calculating parameters of a desired ferrite bead in the filter based on parameters of the filter, the parameters of the ferrite bead including an inductance, a capacitance, and a resonant frequency; adjusting parameters of the filter until the calculated resonant frequency equals or approaches a desired resonant frequency, and finding an inductance and a capacitance respectively equaling or approaching the calculated inductance and the calculated capacitance in the database; and selecting a ferrite bead with the appropriate inductance and capacitance as found in the database for the filter.

    Abstract translation: 提供了一种用于选择用于滤波器的铁氧体磁珠以避免滤波器的频率响应曲线中的峰值的方法。 该方法包括以下步骤:构建等效模型数据库,其中包括铁素体磁珠的等效模型参数,其参数包括每个铁氧体磁珠的相应等效模型的电感和电容; 基于滤波器的参数,包括电感,电容和谐振频率的铁氧体磁珠的参数来计算滤波器中期望的铁氧体磁珠的参数; 调整滤波器的参数,直到计算出的谐振频率等于或接近期望的谐振频率,并且找到分别等于或接近计算出的电感的电感和电容以及数据库中的计算电容; 并选择具有适当的电感和电容的铁氧体磁珠,如过滤器数据库中所述。

    Method for making bump disks
    13.
    发明授权
    Method for making bump disks 失效
    制造碰撞盘的方法

    公开(公告)号:US5951880A

    公开(公告)日:1999-09-14

    申请号:US877100

    申请日:1997-05-26

    CPC classification number: G11B5/6005 G11B23/0021 G11B33/10

    Abstract: A wet etching method for making calibration bump disks for use in providing quality control of production run magnetic hard disks is disclosed. It includes the steps of: (a) coating a layer of bump material on a substrate; (b) coating a photoresist layer on the layer of bump material; (c) exposing the photoresist layer to a light source under a photomask; (d) developing the photoresist layer using a developer solution to form an undeveloped photoresist layer; (e) etching the substrate containing the layer of bump material and the undeveloped photoresist layer to remove portions of the layer of bump material not covered by the undeveloped photoresist layer; and (f) stripping the undeveloped photoresist layer to leave at least a bump on the substrate which was originally covered by the undeveloped photoresist layer. The wet etching method eliminates many of the problems observed from the conventional metal mask method, including the elimination of the convex-shaped bump surface.

    Abstract translation: 公开了一种用于制造用于提供生产运行磁性硬盘的质量控制的校准凸块的湿式蚀刻方法。 它包括以下步骤:(a)在衬底上涂覆一层凸块材料; (b)在凸块材料层上涂覆光致抗蚀剂层; (c)在光掩模下将光致抗蚀剂层曝光于光源; (d)使用显影剂溶液显影光致抗蚀剂层以形成未显影的光致抗蚀剂层; (e)蚀刻含有凸起材料层和未显影光致抗蚀剂层的基板以去除未被未显影光致抗蚀剂层覆盖的凸起材料层的部分; 和(f)剥离未显影的光致抗蚀剂层,以至少留下最初被未显影的光致抗蚀剂层覆盖的基底上的凸块。 湿蚀刻方法消除了从传统的金属掩模方法观察到的许多问题,包括消除凸形凸起表面。

    Power supply device
    14.
    发明授权
    Power supply device 失效
    电源设备

    公开(公告)号:US08581563B2

    公开(公告)日:2013-11-12

    申请号:US13340707

    申请日:2011-12-30

    CPC classification number: H02M3/33523 H02M2001/0003

    Abstract: A power supply device includes a power supply unit and a feedback control unit. The power supply unit is configured for generating an electric potential to be provided to a load. The feedback control unit detects the electric potential and adjusts relevant parameters of the electrical potential to achieve predetermined values. The feedback control unit includes a first feedback circuit and a second feedback circuit electrically connected in series.

    Abstract translation: 电源装置包括电源单元和反馈控制单元。 电源单元被配置为产生要提供给负载的电位。 反馈控制单元检测电位并调整电位的相关参数以实现预定值。 反馈控制单元包括串联电连接的第一反馈电路和第二反馈电路。

    Computing device and method for checking design of printed circuit board layout file
    15.
    发明授权
    Computing device and method for checking design of printed circuit board layout file 失效
    用于检查印刷电路板布局文件设计的计算设备和方法

    公开(公告)号:US08413097B2

    公开(公告)日:2013-04-02

    申请号:US13523874

    申请日:2012-06-14

    CPC classification number: G06F17/5081 G06F2217/78

    Abstract: A computing device reads a printed circuit board (PCB) layout file from a storage device. The PCB layout file includes arrangement information of signal lines, power lines, and power through-holes arranged on a PCB. Furthermore, the computing device sets a reference distance between a selected power through-hole and a neighboring signal line, and searches for one or more line segments of one or more signal lines where the a distance between each of the one or more line segment and the selected power through-hole is less than the reference distance.

    Abstract translation: 计算设备从存储设备读取印刷电路板(PCB)布局文件。 PCB布局文件包括布置在PCB上的信号线,电源线和电源通孔的布置信息。 此外,计算装置设置所选功率通孔和相邻信号线之间的参考距离,并且搜索一个或多个信号线的一个或多个线段,其中,所述一个或多个线段中的每一个之间的距离和 所选功率通孔小于参考距离。

    Injection-locked frequency divider
    16.
    发明授权
    Injection-locked frequency divider 有权
    注入锁分频器

    公开(公告)号:US08390343B2

    公开(公告)日:2013-03-05

    申请号:US12980284

    申请日:2010-12-28

    CPC classification number: H03B5/1215 H03B5/1228 H03B2200/0074

    Abstract: An injection-locked frequency divider is provided and which includes an injection transistor, an oscillator, a current source and a transformer. The injection transistor is used to receive an injection signal. The oscillator is used to divide the injection signal to generate a divided frequency signal. The current source is coupled to the oscillator to provide a current to the oscillator. The transformer is coupled between the injection transistor and the oscillator to increase the equivalent transconductance of the injection transistor, and thus increasing the locking range of the injection-locked frequency divider.

    Abstract translation: 提供了一种注入锁定分频器,其包括注入晶体管,振荡器,电流源和变压器。 注入晶体管用于接收注入信号。 振荡器用于分割注入信号以产生分频信号。 电流源耦合到振荡器以向振荡器提供电流。 变压器耦合在注入晶体管和振荡器之间以增加注入晶体管的等效跨导,从而增加注入锁定分频器的锁定范围。

    Printed circuit board to prevent electrostatic discharge and manufacturing method thereof
    17.
    发明授权
    Printed circuit board to prevent electrostatic discharge and manufacturing method thereof 失效
    用于防止静电放电的印刷电路板及其制造方法

    公开(公告)号:US08294035B2

    公开(公告)日:2012-10-23

    申请号:US12730238

    申请日:2010-03-24

    CPC classification number: H05K1/09

    Abstract: A printed circuit board (PCB) can prevent electrostatic discharge. A number of vias are embedded in the PCB. A circular insulated member is disposed between each via and the number of vias. Each via includes a layer of metal coated on an inner wall of a corresponding insulated member and a through hole bounded by the corresponding insulated member. An acute angle between two tangents which pass through a point of intersection of two overlapped insulated members is greater than twenty degrees.

    Abstract translation: 印刷电路板(PCB)可以防止静电放电。 多个通孔嵌入在PCB中。 在每个通孔和多个通孔之间设置圆形绝缘构件。 每个通孔包括涂覆在相应的绝缘构件的内壁上的金属层和由对应的绝缘构件限定的通孔。 通过两个重叠绝缘部件的交点的两个切线之间的锐角大于二十度。

    INJECTION-LOCKED FREQUENCY DIVIDER
    19.
    发明申请
    INJECTION-LOCKED FREQUENCY DIVIDER 有权
    注射锁频分路器

    公开(公告)号:US20120019289A1

    公开(公告)日:2012-01-26

    申请号:US12980284

    申请日:2010-12-28

    CPC classification number: H03B5/1215 H03B5/1228 H03B2200/0074

    Abstract: An injection-locked frequency divider is provided and which includes an injection transistor, an oscillator, a current source and a transformer. The injection transistor is used to receive an injection signal. The oscillator is used to divide the injection signal to generate a divided frequency signal. The current source is coupled to the oscillator to provide a current to the oscillator. The transformer is coupled between the injection transistor and the oscillator to increase the equivalent transconductance of the injection transistor, and thus increasing the locking range of the injection-locked frequency divider.

    Abstract translation: 提供了一种注入锁定分频器,其包括注入晶体管,振荡器,电流源和变压器。 注入晶体管用于接收注入信号。 振荡器用于分割注入信号以产生分频信号。 电流源耦合到振荡器以向振荡器提供电流。 变压器耦合在注入晶体管和振荡器之间以增加注入晶体管的等效跨导,从而增加注入锁定分频器的锁定范围。

    CURRENT BALANCE CIRCUIT
    20.
    发明申请
    CURRENT BALANCE CIRCUIT 失效
    当前平衡电路

    公开(公告)号:US20110175585A1

    公开(公告)日:2011-07-21

    申请号:US12730225

    申请日:2010-03-23

    CPC classification number: G06F1/26 Y10T307/414 Y10T307/549

    Abstract: A current balance circuit includes a first and a second current sensors, an averager, a first and a second control modules, and a first and a second rheostat elements. The first and second current sensors receive a first current and a second current from a power source respectively and convert the first and second currents into a first and a second voltages. The averager receives the first and second voltages and calculates to obtain an average voltage. The first and second control modules receive the first voltage, the second voltage, and the average voltage, to obtain a first and a second control signals, to control current conduction ability of the first and second rheostat elements, to make the first and second currents keep a dynamic balance.

    Abstract translation: 电流平衡电路包括第一和第二电流传感器,平均器,第一和第二控制模块以及第一和第二变阻器元件。 第一和第二电流传感器分别接收来自电源的第一电流和第二电流,并将第一和第二电流转换成第一和第二电压。 平均器接收第一和第二电压并计算得到平均电压。 第一和第二控制模块接收第一电压,第二电压和平均电压,以获得第一和第二控制信号,以控制第一和第二变阻器元件的电流传导能力,以使第一和第二电流 保持动态平衡。

Patent Agency Ranking