ARRAY SUBSTRATE AND PREPARATION METHOD THEREFOR, AND DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20210296394A1

    公开(公告)日:2021-09-23

    申请号:US17264036

    申请日:2020-06-15

    Abstract: An array substrate and a manufacturing method thereof, a display panel, and a display device are provided. The array substrate includes a bonding region and a non-bonding region, and further includes: a rigid substrate, in the non-bonding region, a driving circuit layer, in the non-bonding region; a light-emitting diode layer, on a side of the driving circuit layer away from the rigid substrate; a flexible base layer, m the bonding region and on the same side of the rigid substrate as the driving circuit layer; and a bonding wire layer, on a side of the flexible base layer away from the rigid substrate. The bonding wire layer and the flexible base layer is capable of being bent along an edge of the rigid substrate to a side of the rigid substrate away from the driving circuit layer.

    DISPLAY PANEL AND DISPLAY APPARATUS
    14.
    发明公开

    公开(公告)号:US20240258325A1

    公开(公告)日:2024-08-01

    申请号:US18016478

    申请日:2022-01-29

    CPC classification number: H01L27/124 H01L25/167

    Abstract: A display panel and a display apparatus are provided. The display panel includes: a base substrate having a first face, a second face, and a side face, the first face including a display region and a peripheral region; multiple first bonding electrodes in the peripheral region each being electrically connected to a display signal line on the first face and extending from the display region to the peripheral region; multiple driving signal lines on the second face of the base substrate, wherein at least one driving signal line is a ground line; multiple side wires each electrically connecting one driving signal line to one first bonding electrode via the side face; and an electrostatic protection layer electrically connected to the ground line and having an orthographic projection on the side face that is at least partially overlapped with orthographic projections of the side wires on the side face.

    CHIP BONDING METHOD AND BONDING DEVICE

    公开(公告)号:US20210159208A1

    公开(公告)日:2021-05-27

    申请号:US16830834

    申请日:2020-03-26

    Abstract: A chip bonding method and a bonding device. The chip bonding method is used for bonding a chip to a display module, the display module includes a substrate and a functional layer on the substrate, the substrate includes a first substrate portion and a second substrate portion, the functional layer is on the first substrate portion, and an electrode is on an upper side of the second substrate portion. The chip bonding method includes: forming a light absorbing film layer on a side of the second substrate portion facing away from the electrode; coating a conductive adhesive film on the electrode, and placing the chip on the conductive adhesive film; and irradiating, by using a laser beam, a side of the second substrate portion facing away from the electrode.

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME, DISPLAY DEVICE AND TILED DISPLAY APPARATUS

    公开(公告)号:US20250098383A1

    公开(公告)日:2025-03-20

    申请号:US18293260

    申请日:2022-12-19

    Abstract: A display panel includes a substrate, a plurality of connection wires, an isolation region and a first electrostatic discharge structure disposed on a second surface. The substrate includes a first surface and a second surface that are opposite, and a plurality of side surfaces, and at least one of the side surfaces is a selected side surface. The connection wires are arranged side by side at intervals, and each of the connection wires includes a first-segment wire, a second-segment wire and a third-segment wire connected in sequence. The first-segment wire is located on the first surface, the second-segment wire is located on the selected side surface, and the third-segment wire is located on the second surface. The first electrostatic discharge structure is arranged on a side of third-segment wires away from the selected side surface. The isolation region is located between the third-segment wires and the first electrostatic discharge structure.

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