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公开(公告)号:US20210296394A1
公开(公告)日:2021-09-23
申请号:US17264036
申请日:2020-06-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ke MENG , Qiangwei CUI , Chao LIU , Lili WANG , Chuhang WANG , Yutian CHU , Linhui GONG
Abstract: An array substrate and a manufacturing method thereof, a display panel, and a display device are provided. The array substrate includes a bonding region and a non-bonding region, and further includes: a rigid substrate, in the non-bonding region, a driving circuit layer, in the non-bonding region; a light-emitting diode layer, on a side of the driving circuit layer away from the rigid substrate; a flexible base layer, m the bonding region and on the same side of the rigid substrate as the driving circuit layer; and a bonding wire layer, on a side of the flexible base layer away from the rigid substrate. The bonding wire layer and the flexible base layer is capable of being bent along an edge of the rigid substrate to a side of the rigid substrate away from the driving circuit layer.
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公开(公告)号:US20210167045A1
公开(公告)日:2021-06-03
申请号:US16862934
申请日:2020-04-30
Inventor: Ke MENG , Chao LIU , Qiangwei CUI , Chuhang WANG , Lili WANG , Linhui GONG , Yutian CHU , Fan YANG
IPC: H01L25/075 , H01L27/12 , H01L33/62
Abstract: A driving substrate includes a base substrate. The base substrate has a display region and a peripheral region, and the peripheral region includes a bonding region between the display region and a first side face of the base substrate. The driving substrate further includes a plurality of first pads spaced apart from each other, which are disposed in the bonding region of the base substrate. A first side face of each first pad is flush with the first side face of the base substrate. A thickness of the first pad is approximately in a range from 0.5 microns to 2 microns.
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13.
公开(公告)号:US20240258477A1
公开(公告)日:2024-08-01
申请号:US18017337
申请日:2022-01-28
IPC: H01L33/62 , H01L25/075
CPC classification number: H01L33/62 , H01L25/0753 , H01L2933/0066
Abstract: A display panel includes a backplane including a first surface, a second surface and at least one side surface, at least one connection lead disposed on the backplane, and a first protective layer. The connection lead extends from the first surface to the second surface via a side surface in the at least one side surface. The connection lead includes a first lead segment located on the first surface, a second lead segment located on the second surface, and a third lead segment located on the side surface and connecting the first lead segment and the second lead segment. The first protective layer covers at least the first lead segment and the third lead segment. At least one opening is disposed in the first protective layer, and at least a portion of the second lead segment is exposed by an opening in the at least one opening.
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公开(公告)号:US20240258325A1
公开(公告)日:2024-08-01
申请号:US18016478
申请日:2022-01-29
Inventor: Chao LIU , Zhonglan ZHAO , Ming ZHAI , Haiwei SUN , Lingyun SHI , Qibing GU , Lili WANG , Mingming JIA , Sha FENG , Jing WANG
CPC classification number: H01L27/124 , H01L25/167
Abstract: A display panel and a display apparatus are provided. The display panel includes: a base substrate having a first face, a second face, and a side face, the first face including a display region and a peripheral region; multiple first bonding electrodes in the peripheral region each being electrically connected to a display signal line on the first face and extending from the display region to the peripheral region; multiple driving signal lines on the second face of the base substrate, wherein at least one driving signal line is a ground line; multiple side wires each electrically connecting one driving signal line to one first bonding electrode via the side face; and an electrostatic protection layer electrically connected to the ground line and having an orthographic projection on the side face that is at least partially overlapped with orthographic projections of the side wires on the side face.
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15.
公开(公告)号:US20230207733A1
公开(公告)日:2023-06-29
申请号:US17926791
申请日:2021-08-06
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Linhui GONG , Chao LIU , Haiwei SUN , Chuhang WANG , Lili WANG , Chaoyang WANG , Xue DONG
CPC classification number: H01L33/382 , H01L25/0753 , H01L33/62 , H01L33/005 , G09F9/3026 , G09F9/33 , H01L2933/0016 , H01L2933/0066
Abstract: A display panel includes a backplane, a plurality of light-emitting devices, a plurality of first electrodes, and a plurality of connection leads. The backplane includes a first main surface a second main surface and a plurality of side surfaces, and at least one side surface is a selected side surface. The plurality of light-emitting devices and the plurality of first electrodes are disposed on the second main surface. The plurality of connection leads are disposed at least on the first main surface and the selected side surface. Each connection lead includes a first portion on the first main surface and a second portion on the selected side surface, and a ratio of a thickness of the first portion to a thickness of the second portion is range in a range of 0.6 and 1.6. Each connection lead is electrically connected to a first electrode.
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公开(公告)号:US20210159208A1
公开(公告)日:2021-05-27
申请号:US16830834
申请日:2020-03-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lili WANG , Haiwei SUN , Zhenxing TANG , Feng QU , Jing LIU , Chao LIU , Chuhang WANG , Qiangwei CUI , Ke MENG , Linhui GONG
Abstract: A chip bonding method and a bonding device. The chip bonding method is used for bonding a chip to a display module, the display module includes a substrate and a functional layer on the substrate, the substrate includes a first substrate portion and a second substrate portion, the functional layer is on the first substrate portion, and an electrode is on an upper side of the second substrate portion. The chip bonding method includes: forming a light absorbing film layer on a side of the second substrate portion facing away from the electrode; coating a conductive adhesive film on the electrode, and placing the chip on the conductive adhesive film; and irradiating, by using a laser beam, a side of the second substrate portion facing away from the electrode.
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公开(公告)号:US20190293995A1
公开(公告)日:2019-09-26
申请号:US16316909
申请日:2018-05-14
Inventor: Xiongzhou WEI , Min LI , Qiang XIONG , Chao LIU , Jiaqi PANG , Bin WAN , Hongyu SUN
IPC: G02F1/1335
Abstract: A color filter (CF) substrate, a manufacturing method thereof and a display panel are provided. The manufacturing method of the substrate includes: providing a base substrate; and forming a black matrix layer and a plurality of first sub-pixel units on the base substrate, wherein the black matrix layer and the plurality of first sub-pixel units are made of photoresist of a same material, the material of the photoresist includes an irreversible thermochromic pigment, the photoresist is changed into black color upon being heated, and a color of the photoresist before color change is the same as a color of the first sub-pixel units.
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18.
公开(公告)号:US20250098383A1
公开(公告)日:2025-03-20
申请号:US18293260
申请日:2022-12-19
IPC: H01L33/62 , H01L23/60 , H01L25/075
Abstract: A display panel includes a substrate, a plurality of connection wires, an isolation region and a first electrostatic discharge structure disposed on a second surface. The substrate includes a first surface and a second surface that are opposite, and a plurality of side surfaces, and at least one of the side surfaces is a selected side surface. The connection wires are arranged side by side at intervals, and each of the connection wires includes a first-segment wire, a second-segment wire and a third-segment wire connected in sequence. The first-segment wire is located on the first surface, the second-segment wire is located on the selected side surface, and the third-segment wire is located on the second surface. The first electrostatic discharge structure is arranged on a side of third-segment wires away from the selected side surface. The isolation region is located between the third-segment wires and the first electrostatic discharge structure.
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公开(公告)号:US20250056980A1
公开(公告)日:2025-02-13
申请号:US18291237
申请日:2022-09-21
Inventor: Yongkai WU , Bo ZHANG , Zhengping XIONG , Yunzhi WANG , Haoyuan FAN , Jinyu CHAO , Yixiang YANG , Gaoyun WANG , Chao LIU
IPC: H10K59/126 , H10K59/131 , H10K59/80
Abstract: The display panel comprises a display region and a bonding region, the bonding region comprises a display substrate and a first adhesive layer, a polarizing layer, a second adhesive layer and a cover plate layer arranged sequentially on a light exit side of the display substrate, the first adhesive layer and the polarizing layer are disposed in a lead region, a bending region and a composite circuit region in the bonding region, the cover plate layer is provided with a cover plate shield layer, at least one of the display substrate, the first adhesive layer and the polarizing layer is provided with a bonding shield layer, the distance between an edge of the bonding shield layer and the boundary of the display region is less than the distance between an edge of the cover plate shield layer and the boundary of the display region.
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20.
公开(公告)号:US20240395988A1
公开(公告)日:2024-11-28
申请号:US18261937
申请日:2022-07-15
Inventor: Lili WANG , Zhonglan ZHAO , Chao LIU , Ming ZHAI , Sha FENG , Qi QI , Jing WANG , Mingming JIA , Heling ZHU
IPC: H01L33/60 , H01L25/075 , H01L33/00 , H01L33/62
Abstract: A display panel includes a substrate, a light-blocking layer, a plurality of connection leads and a light-emitting device layer. The substrate includes a first surface and a second surface opposite to each other, and a plurality of side surfaces connecting the first surface and the second surface. At least one of the plurality of side surfaces is a selected side surface. The light-emitting device layer is disposed on the second surface. Each of the plurality of connection leads includes a first portion located on the first surface of the substrate, a second portion located on the selected side surface of the substrate and a third portion located on the second surface of the substrate. The light-blocking layer is located between the plurality of connection leads and the substrate, and is at least located between first portions of the plurality of connection leads and the first surface of the substrate.
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