Transceiver with Shared Filter for both Transmit and Receive Modes

    公开(公告)号:US20220158687A1

    公开(公告)日:2022-05-19

    申请号:US16953244

    申请日:2020-11-19

    Applicant: Apple Inc.

    Abstract: A transceiver having a shared filter for both transmit and receive modes is disclosed. A transceiver includes a transmitter having an output coupled to a signal node, wherein the transmitter is configured to transmit signals onto the signal node during transceiver operation in a transmit mode. The transceiver also includes a receiver having an input coupled to the signal node, and configured to receive signals from the signal node during operation in the receive mode. The transceiver further includes a first filter coupled to the signal node, wherein the filter is shared by the transmitter and the receiver. The filter is coupled between the transceiver and a first terminal of a transmission line.

    Wideband Voltage-Controlled Oscillator Circuitry

    公开(公告)号:US20250047241A1

    公开(公告)日:2025-02-06

    申请号:US18924876

    申请日:2024-10-23

    Applicant: Apple Inc.

    Abstract: An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.

    POWER COMBINER/DIVIDER WITH BROADBAND ISOLATION

    公开(公告)号:US20250030144A1

    公开(公告)日:2025-01-23

    申请号:US18356964

    申请日:2023-07-21

    Applicant: Apple Inc.

    Abstract: This disclosure is directed to a power combiner/divider with improved operating frequency range (e.g., bandwidth) compared to other power combiners/dividers. The power combiner/divider may include an isolation circuit including a first resonant circuit and a second resonant circuit coupled to terminals (e.g., input terminals, output terminals) of the power combiner/divider. The first resonant circuit may attenuate signals having frequencies in a first frequency range below an attenuation threshold between the terminals of the power combiner/divider. The second resonant circuit may attenuate signals having frequencies in a second frequency range below an attenuation threshold between the terminals of the power combiner/divider. Accordingly, the isolation circuit may improve isolation between multiple terminals of the power combiner/divider at a wider bandwidth compared to other power combiners/dividers based attenuating cross-talk between the terminal at the first frequency range and the second frequency range.

    Systems and methods for improved charge pump phase-locked loop phase stability

    公开(公告)号:US12199621B2

    公开(公告)日:2025-01-14

    申请号:US18135343

    申请日:2023-04-17

    Applicant: Apple Inc.

    Abstract: In a charge pump-based PLL circuit, charge pump output current variation may cause phase instability at an output of a VCO. The output current variation may be caused by low-frequency disturbances (e.g., tuning voltage (Vtune) drift with channel length modulation effect), disturbance in a gate bias voltage of a transistor, or a VDD transient. Such a low-frequency disturbance may occur during initial lock, which may affect phase settling time, or after lock, which may result in phase instability. A replica charge pump and a current filtering and compensation circuit may be implemented at the output of a main charge pump to provide error current compensation to suppress channel length modulation effect, improve phase stability, and reduce phase noise.

    Wideband voltage-controlled oscillator circuitry

    公开(公告)号:US12184232B2

    公开(公告)日:2024-12-31

    申请号:US18359593

    申请日:2023-07-26

    Applicant: Apple Inc.

    Abstract: An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.

    FEEDBACK-TUNING BASED VARIABLE GAIN AMPLIFIER

    公开(公告)号:US20240372511A1

    公开(公告)日:2024-11-07

    申请号:US18142540

    申请日:2023-05-02

    Applicant: Apple Inc.

    Abstract: This disclosure is directed to an amplifier (e.g., a variable gain amplifier (VGA)) with improved linearity compared to other amplifiers. The amplifier may include degeneration inductors and a tunable degeneration resistor to generate amplified signals. The degeneration inductors and the tunable degeneration resistor may form a resonant circuit to improve linearity of the amplified signal at a desired frequency by reducing direct current (DC) components and harmonic components of the amplified signal having the desired frequency. Moreover, the amplifier may also generate the amplified signals with improved linearity at back-off output powers based on using the tunable degeneration resistor and the degeneration inductors. As such, the amplifier may include the degeneration inductors and the tunable degeneration resistor to generate the amplified signals having an output power across a range of output powers, such as a peak output power and one or multiple back-off output powers, with improved linearity.

    Radio-frequency Power Detector with Non-linearity Cancellation

    公开(公告)号:US20240305389A1

    公开(公告)日:2024-09-12

    申请号:US18181466

    申请日:2023-03-09

    Applicant: Apple Inc.

    CPC classification number: H04B17/15

    Abstract: Wireless circuitry can include a radio-frequency amplifier and a power detection circuit coupled to an output of the radio-frequency amplifier. The power detection circuit can include an input transistor, a biasing circuit configured to output a bias voltage for the input transistor and configured to track temperature and voltage variations, and a non-linearity cancellation component configured to generate a current that at least partially cancels a non-linear current associated with the input transistor. The input transistor may be an n-type transistor, and the non-linearity cancellation component may be a p-type metal-oxide-semiconductor capacitor. The biasing circuit can include n-type and p-type diode-connected bias transistors.

    NMOS super source follower low dropout regulator

    公开(公告)号:US11829175B2

    公开(公告)日:2023-11-28

    申请号:US17942807

    申请日:2022-09-12

    Applicant: Apple Inc.

    CPC classification number: G05F1/575 G05F1/59

    Abstract: Embodiments disclosed herein relate to a low-voltage dropout regulator and more specifically to improving a power supply rejection ratio (PSRR) of the low dropout voltage regulator. The low dropout voltage regulator may be used to generate various voltages for integrated circuits of an electronic device. In some cases, a P-type metal-oxide-semiconductor (PMOS) low dropout (LDO) voltage regulator may be used. However, the PMOS LDO may not provide a sufficient PSRR or reduction in supply noise. To address these issues, an N-type metal-oxide-semiconductor (NMOS) LDO voltage regulator having an NMOS pass transistor may be used. The NMOS LDO may provide a lower impedance than the PMOS LDO. Further, the NMOS LDO may provide an increased bandwidth and consume a smaller physical area than the PMOS LDO.

    Electrostatic Discharge Network for Driver Gate Protection

    公开(公告)号:US20230352932A1

    公开(公告)日:2023-11-02

    申请号:US17661503

    申请日:2022-04-29

    Applicant: Apple Inc.

    CPC classification number: H02H9/046 H01L27/0255

    Abstract: An output circuit included in an integrated circuit may employ multiple protection circuits to protect driver devices from damage during an electrostatic discharge event. One protection circuit clamps a signal port to a ground supply node upon detection of the electrostatic discharge event. Another protection circuit increases the voltage level of a control terminal to one of the driver devices during the electrostatic discharge event to reduce the voltage across the driver device and prevent damage to the device.

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