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91.
公开(公告)号:US20240047499A1
公开(公告)日:2024-02-08
申请号:US18491450
申请日:2023-10-20
Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Inventor: Kyohei MIZUTA
IPC: H01L27/146 , H04N25/77 , H01L21/768 , H04N25/67 , H01L25/065 , H04N25/79 , H04N25/70 , H01L23/522
CPC classification number: H01L27/14636 , H01L27/14623 , H01L27/14627 , H01L27/14634 , H01L27/14645 , H01L27/1469 , H04N25/77 , H01L27/14638 , H01L21/76898 , H04N25/67 , H01L25/0657 , H04N25/79 , H01L27/146 , H04N25/70 , H01L23/5226
Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.
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公开(公告)号:US20240038792A1
公开(公告)日:2024-02-01
申请号:US18482923
申请日:2023-10-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongseok Cho , Jongeun Park , Jeongsoon Kang , Gyunha Park , Gwideok Ryan Lee
IPC: H01L27/146 , H04N25/79 , H04N25/77 , H04N25/78
CPC classification number: H01L27/1461 , H04N25/79 , H04N25/77 , H04N25/78 , H01L27/14645
Abstract: The stacked image sensor includes a first semiconductor substrate and including a photoelectric conversion region and a floating diffusion area, a first insulating layer under the first semiconductor substrate and including a gate of a transfer transistor, a second semiconductor substrate under the first insulating layer and including first impurities of a first conductivity type, and a second insulating layer under the second semiconductor substrate and including a metal pad of a floating diffusion node and a gate of a source follower transistor, wherein the floating diffusion area and the metal pad of the floating diffusion node are electrically connected through a deep contact that is in the first insulating layer and the second semiconductor substrate. The second semiconductor substrate further includes a well region. At least a portion of deep contact may be in the well region. The well region may surround the deep contact.
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公开(公告)号:US11889170B2
公开(公告)日:2024-01-30
申请号:US17419942
申请日:2020-02-10
Applicant: Sony Semiconductor Solutions Corporation
Inventor: Goshi Watanabe
IPC: H04N23/52 , G06V20/00 , G01K13/00 , G06N3/04 , G06T5/30 , H04N23/80 , H04N23/60 , G06V10/82 , H04N23/617 , H04N23/81 , H04N25/42 , H04N25/443 , H04N25/79 , G06T1/00
CPC classification number: H04N23/52 , G01K13/00 , G06N3/04 , G06T1/0007 , G06T5/30 , G06V10/82 , G06V20/00 , H04N23/617 , H04N23/665 , H04N23/80 , H04N23/81 , H04N25/42 , H04N25/443 , H04N25/79
Abstract: An imaging device, electronic equipment, and an imaging method capable of controlling a temperature rise are provided. The imaging device (CIS 2) according to the present disclosure includes an imaging unit (22), an information processing unit (DNN processing unit 23), a temperature detection unit (25), and a control unit (CIS control unit 21). The imaging unit (22) captures an image and generates image data. The information processing unit (DNN processing unit 23) performs processing with respect to the image data read from the imaging unit (22). The temperature detection unit (25) detects temperature. The control unit (CIS control unit 21) changes the processing performed by the information processing unit (DNN processing unit 23) according to the temperature detected by the temperature detection unit (25).
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公开(公告)号:US20240031701A1
公开(公告)日:2024-01-25
申请号:US18373355
申请日:2023-09-27
Applicant: NIKON CORPORATION
Inventor: Takashi KURIYAMA , Hironobu MURATA , Shiro TSUNAI , Tetsuya KONISHI , Masahiro SUZUKI
IPC: H04N25/75 , H01L27/146 , H04N23/73 , H04N25/77 , H04N25/79 , H04N25/443 , H04N25/533 , H04N25/583 , H04N25/771 , H04N25/772
CPC classification number: H04N25/75 , H01L27/14634 , H01L27/1464 , H04N23/73 , H04N25/77 , H04N25/79 , H04N25/443 , H04N25/533 , H04N25/583 , H04N25/771 , H04N25/772
Abstract: An imaging element comprising: an imaging unit that has: a plurality of groups each including at least one pixel; and a plurality of signal readout units that are each provided to each of the groups and read out a signal from the pixel; and a control unit that controls the signal readout unit in at least one group among the plurality of groups is provided. Each of the plurality of groups may include a plurality of the pixels. The control unit may select at least one group among the plurality of groups and control the signal readout unit by using a control parameter that is different from a control parameter that is used for another group among the plurality of groups.
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公开(公告)号:US11876954B2
公开(公告)日:2024-01-16
申请号:US17816224
申请日:2022-07-29
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Nicholas Paul Cowley , Andrew David Talbot
IPC: H04N17/00 , H04N25/79 , H04N25/771 , H01L27/146
CPC classification number: H04N17/002 , H04N25/771 , H04N25/79 , H01L27/14603
Abstract: An image sensor may be implemented using a stitched image sensor die. The stitched image sensor die may be formed from a step and repeat exposure process using a set of tiles in a reticle set. Multiple instantiations of a same circuitry block on a given tile may be patterned and formed on the image sensor die. The image sensor die may include circuitry configured to enable testing of one or more instantiations of the same circuitry block. The image sensor die may include memory circuitry for storing indications of a functional instantiation of the multiple instances and may use the functional instantiation for normal operation.
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公开(公告)号:US20230421929A1
公开(公告)日:2023-12-28
申请号:US18340789
申请日:2023-06-23
Applicant: CANON KABUSHIKI KAISHA
Inventor: MAKOTO ISE , ISAO HAYASHI
Abstract: An image sensor including a first signal processing circuit including a first ramp signal generation circuit and a first analog-to-digital (AD) conversion circuit, a second signal processing circuit including a second ramp signal generation circuit and a second AD conversion circuit, and wiring connected so that a first ramp signal output from the first ramp signal generation circuit is supplied to the first and second AD conversion circuits, and a second ramp signal output from the second ramp signal generation circuit is supplied to the first and second AD conversion circuits.
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公开(公告)号:US20230421911A1
公开(公告)日:2023-12-28
申请号:US18244539
申请日:2023-09-11
Applicant: NIKON CORPORATION
Inventor: Koichi GOHARA , Satoshi TSUCHIYA
IPC: H04N23/73 , H01L27/146 , H04N23/12 , H04N23/63 , H04N23/84 , H04N23/67 , H04N25/44 , H04N25/79 , H04N25/13
CPC classification number: H04N23/73 , H01L27/14621 , H01L27/1464 , H04N23/12 , H04N23/63 , H04N23/84 , H04N23/673 , H04N25/44 , H04N25/79 , H04N25/134 , H01L27/14627 , H01L27/14634 , H01L27/14636 , H01L27/14645
Abstract: An electronic device includes: an imaging unit including a region having a pixel group that has a plurality of first pixels, and second pixels that are fewer than the first pixels in the pixel group; and a control unit that reads out the signals based upon exposure of the second pixels during exposure of the plurality of first pixels.
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公开(公告)号:US11849238B2
公开(公告)日:2023-12-19
申请号:US17591496
申请日:2022-02-02
Applicant: CANON KABUSHIKI KAISHA
Inventor: Kei Ochiai , Yoshiaki Takada , Masaki Sato , Masahiro Kobayashi , Daisuke Kobayashi , Tetsuya Itano , Nao Nakatsuji , Yasuhiro Oguro
IPC: H04N25/772 , H04N25/50 , H04N25/75 , H04N25/79 , H01L27/146
CPC classification number: H04N25/772 , H04N25/50 , H04N25/75 , H04N25/79 , H01L27/14634
Abstract: A photoelectric conversion apparatus includes a first substrate including a pixel array including a plurality of pixels, a second substrate layered on the first substrate and including an AD conversion portion including a plurality of AD conversion circuits configured to convert a signal output from the first substrate into a digital signal, wherein the second substrate further includes a plurality of signal processing units including a first signal processing unit and a second signal processing unit both configured to perform machine learning processing, wherein each of a plurality of sets includes a plurality of AD conversion circuits that differ between the plurality of sets, wherein the first signal processing unit is arranged to correspond to one of the plurality of sets, and wherein the second signal processing unit is arranged to correspond to another one of the plurality of sets.
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公开(公告)号:US11848337B2
公开(公告)日:2023-12-19
申请号:US17306838
申请日:2021-05-03
Applicant: Depuy Synthes Products, Inc.
Inventor: Laurent Blanquart , Joshua D. Talbert , Jeremiah D. Henley , Donald M. Wichern
IPC: H01L27/14 , H01L27/146 , A61B1/00 , H01L23/00 , H04N23/56 , H04N25/75 , H04N25/79 , H04N25/767 , H04N25/772 , H04N25/778 , A61B1/05 , A61B1/06 , H01L25/065 , H01L27/12 , H04N23/50 , H01L31/028 , H01L31/0296 , H01L31/0304
CPC classification number: H01L27/14603 , A61B1/00009 , A61B1/051 , A61B1/0676 , H01L24/17 , H01L24/20 , H01L24/28 , H01L25/0657 , H01L27/124 , H01L27/146 , H01L27/1464 , H01L27/1469 , H01L27/14601 , H01L27/14609 , H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/14638 , H01L27/14641 , H01L27/14643 , H01L27/14689 , H04N23/56 , H04N25/75 , H04N25/767 , H04N25/772 , H04N25/778 , H04N25/79 , H01L31/028 , H01L31/0296 , H01L31/0304 , H01L2924/0002 , H01L2924/381 , H04N23/555 , H01L2924/0002 , H01L2924/00
Abstract: An imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed. Embodiments of the above may include systems, methods and processes for staggering ADC or column circuit bumps in a column or sub-column hybrid image sensor using vertical interconnects are also disclosed.
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公开(公告)号:US11838613B2
公开(公告)日:2023-12-05
申请号:US16607597
申请日:2018-04-26
Applicant: ALLIED VISION TECHNOLOGIES GMBH
Inventor: Ralf Steffen Hesterberg , Olaf Funk , Eike Francksen , Erik Busse
Abstract: A device for capturing data in the region of a digital camera. Within a camera housing, electronic components are arranged on at least two printed circuit boards. The circuit boards are joined to form a stack. At least one recess is formed in the region of at least one circuit board on the side associated with another circuit board, to receive components arranged on another circuit board. The digital camera optionally has at least one contour milling in the region of a circuit board for height compensation relative to the image sensor in the digital camera. The mechanical securing mechanism of a connection device of an interface into a fastening element connected to the circuit board stack is integrated with the connecting of the housing parts by a preloaded clip. A method for electrical contacting, by which essential parts of the device for capturing data can be produced.