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公开(公告)号:US20180211612A1
公开(公告)日:2018-07-26
申请号:US15319755
申请日:2016-08-19
Inventor: GUANGHUI HONG , GUI CHEN , QIANG GONG
IPC: G09G3/36 , G02F1/133 , G02F1/1362
CPC classification number: G09G3/36 , G02F1/13306 , G02F1/136286 , G09G3/006 , G09G3/3677 , G09G2300/0408 , G09G2330/04
Abstract: The present disclosure provides a gate driver on array (GOA) circuit, where the GOA circuit includes a GOA driving chip, a GOA driving signal line, an array substrate test chip, a test signal line, and a GOA protecting circuit. The GOA driving chip is used to generate a scan driving signal. The GOA driving signal line is used to transmit the scan driving signal to a corresponding scan line. The array substrate test chip is used to generate an array substrate test signal. The test signal line is used to transmit the array substrate test signal to the corresponding scan line. The GOA protecting circuit is arranged between the GOA driving signal line and the test signal line.