公开(公告)号：US10467973B2

公开(公告)日：2019-11-05

申请号：US15206500

申请日：2016-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Hyun Ko ,  Yong Joo Song ,  Jun Ho Song

IPC: G09G3/36 ,  H03F3/45 ,  H03F3/30

Abstract: A buffer amplifier circuit includes a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load and a feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first and second active loads using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal.

公开(公告)号：US20170032755A1

公开(公告)日：2017-02-02

申请号：US15206500

申请日：2016-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Hyun Ko ,  Yong Joo Song ,  Jun Ho Song

IPC: G09G3/36 ,  H03F3/45

Abstract: A buffer amplifier circuit includes a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load and a feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first and second active loads using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal.

Abstract translation: 缓冲放大器电路包括缓冲放大器，该缓冲放大器包括具有第一有源负载的第一差分放大器和具有第二有源负载的第二差分放大器和被配置为将缓冲放大器的输出端的输出信号反馈到 第一和第二有源负载使用差分开关信号和缓冲放大器的输入信号来增强输出信号的转换速率。