MULTIPLE POWER MANAGEMENT INTEGRATED CIRCUITS AND APPARATUS HAVING DUAL PIN INTERFACE

    公开(公告)号:US20220155807A1

    公开(公告)日:2022-05-19

    申请号:US17665907

    申请日:2022-02-07

    Abstract: Multiple power management integrated circuits (PMICs) may perform communication and power sequence operation coordination between the multiple PMICs through a communication interface connected to two signal lines using a dual pin interface. The multiple PMICs include a main PMIC configured to communicate with at least one application processor through a system interface and at least one sub-PMIC configured to communicate with the main PMIC through the communication interface. A first signal line uses a single bidirectional signaling scheme, and a power status signal PSTATUS is exchanged between the main PMIC and the at least one sub-PMIC through the first signal line. A second signal line uses a single unidirectional signaling scheme, and a power sequence control signal PIF is transmitted from the main PMIC to the at least one sub-PMIC through the second signal line.

    POWER MANAGEMENT DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

    公开(公告)号:US20250021119A1

    公开(公告)日:2025-01-16

    申请号:US18523424

    申请日:2023-11-29

    Abstract: A power management device includes a main power management integrated circuit (PMIC) and at least one sub PMIC that communicates with the main PMIC through a dedicated pin. The main PMIC includes a first pin, enables first functions associated with a first initial operation based on a battery voltage during a stand-by period before generating first output voltages based on the battery voltage and applies a first sub enable signal to the at least one sub PMIC through the first pin based on a power-on signal after completing the first initial operation. The at least one sub PMIC includes a second pin, receives the first sub enable signal through the second pin and enables second functions associated with a second initial operation based on the battery voltage, in response to an activation of the first sub enable signal.

    MULTIPLE POWER MANAGEMENT INTEGRATED CIRCUITS AND APPARATUS HAVING DUAL PIN INTERFACE

    公开(公告)号:US20210271276A1

    公开(公告)日:2021-09-02

    申请号:US17027946

    申请日:2020-09-22

    Abstract: Multiple power management integrated circuits (PMICs) may perform communication and power sequence operation coordination between the multiple PMICs through a communication interface connected to two signal lines using a dual pin interface. The multiple PMICs include a main PMIC configured to communicate with at least one application processor through a system interface and at least one sub-PMIC configured to communicate with the main PMIC through the communication interface. A first signal line uses a single bidirectional signaling scheme, and a power status signal PSTATUS is exchanged between the main PMIC and the at least one sub-PMIC through the first signal line. A second signal line uses a single unidirectional signaling scheme, and a power sequence control signal PIF is transmitted from the main PMIC to the at least one sub-PMIC through the second signal line.

Patent Agency Ranking