MEMORY SYSTEM AND METHOD OF OPERATING THE SAME

    公开(公告)号:US20230195327A1

    公开(公告)日:2023-06-22

    申请号:US18050585

    申请日:2022-10-28

    CPC classification number: G06F3/0619 G06F3/0673 G06F3/0653

    Abstract: A memory system includes a semiconductor memory device and a memory controller configured to control the semiconductor memory device. The semiconductor memory device includes a memory cell array including a plurality of memory cells configured to store data, a refresh controller configured to control a refresh operation with respect to the plurality of memory cells, and an error monitoring circuit configured to generate error information by monitoring an error in the data stored in the memory cell array based on refresh sensing data provided from the memory cell array during the refresh operation. The memory controller includes an error correction code (ECC) circuit and is further configured to correct the error in the data stored in the memory cell array using the ECC circuit based on the error information.

    Electronic device and image acquisition method thereof

    公开(公告)号:US11082612B2

    公开(公告)日:2021-08-03

    申请号:US16763261

    申请日:2018-11-29

    Abstract: An electronic device according to various embodiments of the present invention comprises a processor and an image sensor module electrically connected to the processor, wherein: the image sensor module comprises an image sensor and a control circuit, which is electrically connected to the image sensor and is connected to the processor by an interface; the control circuit is set so as not to compress at least one image acquired from the image sensor according to a first readout speed, but to transmit the same to the processor, and to compress at least one image acquired from the image sensor according to a second readout speed that is faster than the first readout speed and to transmit the same to the processor; and the processor can be set so as to acquire a first image set by using the image sensor according to a predetermined readout speed, compare at least two images included in the first image set, set, as either the first readout speed or the second readout speed, the readout speed corresponding to the image sensor on the basis of the result of the comparison of the at least two images included in the first image set, and acquire a second image set according to either the set first readout speed or second readout speed, by using the image sensor. Additional various embodiments are possible.

    Memory system and method of operating the same

    公开(公告)号:US12079488B2

    公开(公告)日:2024-09-03

    申请号:US18050585

    申请日:2022-10-28

    Abstract: A memory system includes a semiconductor memory device and a memory controller configured to control the semiconductor memory device. The semiconductor memory device includes a memory cell array including a plurality of memory cells configured to store data, a refresh controller configured to control a refresh operation with respect to the plurality of memory cells, and an error monitoring circuit configured to generate error information by monitoring an error in the data stored in the memory cell array based on refresh sensing data provided from the memory cell array during the refresh operation. The memory controller includes an error correction code (ECC) circuit and is further configured to correct the error in the data stored in the memory cell array using the ECC circuit based on the error information.

    Electronic device including a plurality of image sensors and method for thereof

    公开(公告)号:US11671704B2

    公开(公告)日:2023-06-06

    申请号:US17521346

    申请日:2021-11-08

    CPC classification number: H04N23/667 H04N23/45 H04N23/632 H04N23/69 H04N23/57

    Abstract: Various embodiments may provide an electronic device including a memory, a first image sensor circuit, a second image sensor circuit, and at least one processor, operatively connected to the first image sensor circuit and the second image sensor circuit, configured to control the first image sensor circuit to output first frame data associated with a first field of view at a first frame rate from a first time point to a second time point, and store the first frame data in the memory, control the second image sensor circuit to output second frame data associated with a second field of view at the first frame rate from a third time point after the second time point to a fourth time point, and store the second frame data in the memory, obtain the stored first frame data and the stored second frame data from the memory.

Patent Agency Ranking