公开(公告)号：US11740967B2

公开(公告)日：2023-08-29

申请号：US17587418

申请日：2022-01-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Wook Park

IPC: G11C29/52 ,  G06F11/10 ,  H03M13/09 ,  H03M13/05

CPC classification number: G06F11/1068 ,  G06F11/1048 ,  G11C29/52 ,  H03M13/05 ,  H03M13/09

Abstract: A memory device, a memory system, and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells and a write command determination unit (WCDU) that determines whether a write command input to the memory device is (to be) accompanied a masking signal. The WCDU produces a first control signal if the input write command is (to be) accompanied by a masking signal. A data masking unit combines a portion of read data read from the memory cell array with a corresponding portion of input write data corresponding to the write command and generates modulation data in response to the first control signal. An error correction code (ECC) engine generates parity of the modulation data.

公开(公告)号：US10997020B2

公开(公告)日：2021-05-04

申请号：US16666617

申请日：2019-10-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Wook Park

IPC: G06F11/10 ,  H03M13/09 ,  H03M13/05 ,  G11C29/52

Abstract: A memory device, a memory system, and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells and a write command determination unit (WCDU) that determines whether a write command input to the memory device is (to be) accompanied a masking signal. The WCDU produces a first control signal if the input write command is (to be) accompanied by a masking signal. A data masking unit combines a portion of read data read from the memory cell array with a corresponding portion of input write data corresponding to the write command and generates modulation data in response to the first control signal. An error correction code (ECC) engine generates parity of the modulation data.

公开(公告)号：US11269724B2

公开(公告)日：2022-03-08

申请号：US17306345

申请日：2021-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Wook Park

IPC: G11C29/52 ,  G06F11/10 ,  H03M13/09 ,  H03M13/05

Abstract: A memory device, a memory system, and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells and a write command determination unit (WCDU) that determines whether a write command input to the memory device is (to be) accompanied a masking signal. The WCDU produces a first control signal if the input write command is (to be) accompanied by a masking signal. A data masking unit combines a portion of read data read from the memory cell array with a corresponding portion of input write data corresponding to the write command and generates modulation data in response to the first control signal. An error correction code (ECC) engine generates parity of the modulation data.

公开(公告)号：US12292793B2

公开(公告)日：2025-05-06

申请号：US18355157

申请日：2023-07-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Wook Park

IPC: G11C29/52 ,  G06F11/10 ,  H03M13/05 ,  H03M13/09

Abstract: A memory device, a memory system, and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells and a write command determination unit (WCDU) that determines whether a write command input to the memory device is (to be) accompanied a masking signal. The WCDU produces a first control signal if the input write command is (to be) accompanied by a masking signal. A data masking unit combines a portion of read data read from the memory cell array with a corresponding portion of input write data corresponding to the write command and generates modulation data in response to the first control signal. An error correction code (ECC) engine generates parity of the modulation data.

公开(公告)号：US10545820B2

公开(公告)日：2020-01-28

申请号：US15154277

申请日：2016-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Wook Park

IPC: G06F11/10 ,  H03M13/09 ,  H03M13/05 ,  G11C29/52

Abstract: A memory device, a memory system, and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells and a write command determination unit (WCDU) that determines whether a write command input to the memory device is (to be) accompanied a masking signal. The WCDU produces a first control signal if the input write command is (to be) accompanied by a masking signal. A data masking unit combines a portion of read data read from the memory cell array with a corresponding portion of input write data corresponding to the write command and generates modulation data in response to the first control signal. An error correction code (ECC) engine generates parity of the modulation data.

公开(公告)号：US10387276B2

公开(公告)日：2019-08-20

申请号：US15596540

申请日：2017-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ye-Sin Ryu ,  Jong-Wook Park ,  Youn-Hyung Kang

IPC: G11C29/00 ,  G06F11/16 ,  G06F3/06 ,  G06F11/10 ,  G11C29/52 ,  G11C29/04

Abstract: A method of operating a semiconductor memory device including a memory cell array and an error correction code (ECC) engine, wherein the memory cell array includes a plurality of memory cells and the ECC engine is configured to perform an error correction operation on data of the memory cell array, may include storing, in a nonvolatile storage, a mapping information indicating physical addresses of normal cells to swap with a portion of fail cells when a first unit of memory cells includes a number of the fail cells exceeding an error correction capability of the ECC engine. The first unit of memory cells of the memory cells may be accessed based on a logical address. The method may include performing a memory operation on the memory cell array selectively based on the mapping information.