IMAGE SENSOR CONTROLLING A CONVERSION GAIN IMAGING DEVICE HAVING THE SAME, AND METHOD OF OPERATING THE SAME

    公开(公告)号:US20220345649A1

    公开(公告)日:2022-10-27

    申请号:US17860878

    申请日:2022-07-08

    Abstract: Provided is an image sensor including a first pixel including a first floating diffusion region and a second floating diffusion region, a second pixel including a first floating diffusion region, a second floating diffusion region, and a third floating diffusion region, a third pixel including a first floating diffusion region and a second floating diffusion region, and a fourth pixel including a first floating diffusion region, a second floating diffusion region, and a third floating diffusion region, wherein the second floating diffusion region of the first pixel and the second floating diffusion region of the second pixel are connected through a first metal line, and wherein the third floating diffusion region of the second pixel and the third floating diffusion region of the third pixel are connected through a second metal.

    PIXEL ARRAY AND DEVICES INCLUDING THE SAME
    4.
    发明公开

    公开(公告)号:US20230144373A1

    公开(公告)日:2023-05-11

    申请号:US17984086

    申请日:2022-11-09

    CPC classification number: H04N5/3745 H04N5/378 H01L27/1463

    Abstract: A pixel array including pixels arranged in a matrix shape is provided. The pixels have a same structure and are separated from each other by front deep trench isolation (FDTI). A first pixel among the pixels includes a first floating diffusion region, a first group of photoelectric conversion elements, a first group of charge transfer transistors, a first source follower transistor, and a first transistor, a second transistor, and a first reset transistor connected in series between the first floating diffusion region and a voltage supply line. One of the first transistor, the second transistor, and the first reset transistor is formed in a first sub-pixel region. At least another one of the first transistor, the second transistor, and the first reset transistor is formed in a second sub-pixel region. The first sub-pixel region and the second sub-pixel region are separated from each other by the FDTI.

    IMAGE SENSORS
    5.
    发明申请

    公开(公告)号:US20220210348A1

    公开(公告)日:2022-06-30

    申请号:US17470302

    申请日:2021-09-09

    Abstract: An image sensor includes first conductive patterns on a first surface of a substrate, and second conductive patterns between the first conductive patterns and the first surface, in which at least one of the first conductive patterns or the second conductive patterns includes a time constant adjustment pattern and neighboring conductive patterns, in which the time constant adjustment pattern extends in a first direction that is parallel to the first surface and the neighboring conductive patterns extend in the first direction and are most adjacent to the time constant adjustment pattern. The time constant adjustment pattern includes one or more time constant adjustment portions that protrude in a second direction that is parallel to the first surface and is perpendicular to the first direction, and the one or more time constant adjustment portions do not overlap the neighboring conductive patterns in the second direction.

    PIXEL ARRAY AND IMAGE SENSOR INCLUDING THE SAME

    公开(公告)号:US20220116557A1

    公开(公告)日:2022-04-14

    申请号:US17495052

    申请日:2021-10-06

    Abstract: A pixel array for an image sensor includes: a first pixel including a floating diffusion node, and a first selection transistor configured to output a first pixel signal generated using a voltage of the floating diffusion node of the first pixel; a second pixel including a floating diffusion node, and a second selection transistor configured to output a second pixel signal generated using a voltage of the floating diffusion node of the second pixel; and a column line connected to the first and second selection transistors. The floating diffusion nodes of the first and second pixels may be configured to be electrically connected to each other, and the first selection transistor and the second selection transistor may be configured to be turned on so that the first pixel signal and the second pixel signal are output to the column line, in a low conversion gain mode.

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