公开(公告)号：US20140353608A1

公开(公告)日：2014-12-04

申请号：US14060883

申请日：2013-10-23

Applicant: Samsung Display Co., Ltd.

Inventor： YONG-JAE KIM ,  HAE-YEON LEE ,  BO-YONG CHUNG ,  JIN-GON OH

IPC: H01L27/32

CPC classification number: G09G3/3233 ,  G09G2300/0852 ,  G09G2300/0861

Abstract: There is provided a pixel, including an organic light emitting diode (OLED), a first transistor whose gate electrode is coupled to a first node, whose first electrode is coupled to a first power supply via a third node, and whose second electrode is coupled to an anode electrode of the OLED, a second transistor coupled between a data line and a second node and turned on when a scan signal is supplied to a scan line, a first capacitor coupled between the second node and a first voltage source, a third transistor coupled between the second node and the first node and turned on when a second control signal is supplied, and a fourth transistor coupled between the first node and the first power supply and turned on when a first control signal is supplied.

Abstract translation: 提供了一种像素，包括有机发光二极管（OLED），第一晶体管，其栅电极耦合到第一节点，其第一电极经由第三节点耦合到第一电源，并且其第二电极耦合 耦合到所述OLED的阳极电极，耦合在数据线和第二节点之间的第二晶体管，并且当扫描信号被提供给扫描线时被接通;耦合在所述第二节点和第一电压源之间的第一电容器， 耦合在第二节点和第一节点之间的晶体管，并且当提供第二控制信号时导通，以及第四晶体管，耦合在第一节点和第一电源之间，并且当提供第一控制信号时导通。

公开(公告)号：US20240185750A1

公开(公告)日：2024-06-06

申请号：US18228244

申请日：2023-07-31

Applicant: Samsung Display Co., LTD.

Inventor： HAE-YEON LEE ,  SUKYOUNG KIM ,  HWAYOUNG SONG ,  KWANGSAE LEE ,  IL-JOO KIM

IPC: G09G3/00 ,  G06F3/041 ,  G06F3/044 ,  H10K59/131 ,  H10K59/40

CPC classification number: G09G3/006 ,  G06F3/0412 ,  G06F3/0443 ,  G09G3/035 ,  H10K59/131 ,  H10K59/40 ,  H10K2102/311

Abstract: A display device includes: a substrate including a display area, a peripheral area surrounding the display area, a hole area positioned inside the display area, and a pad area; a crack detection line including a first part in the pad area and extending to the peripheral area and a second part connected to the first part, disposed to surround the hole area, and extending to the pad area; a printed circuit board in the pad area; first transistors in the pad area and connected in series between the printed circuit board and the first part, where each of gate electrodes of the first transistors is connected to a first signal line; and second transistors in the pad area and connected in series between a constant voltage line and the first part, where each of gate electrodes of the second transistors is connected to a second signal line.