公开(公告)号：US20250061262A1

公开(公告)日：2025-02-20

申请号：US18935822

申请日：2024-11-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joonnyung LEE ,  Yeongjun KWON ,  Jaeyong SHIN ,  Jeonghoon AHN ,  Yunki CHOI

IPC: G06F30/3953 ,  H01L23/528

Abstract: A method of designing an interconnect structure of a semiconductor apparatus is provided. The interconnect structure includes interconnection layers sequentially stacked on a semiconductor substrate, and each of the interconnection includes dummy metal patterns and main metal patterns. The method includes: determining a layout of the main metal patterns included in each of the plurality of interconnection layers; determining a number of interconnection layers in the plurality of interconnection layers; and determining a layout of the dummy metal patterns included in each of the plurality of interconnection layers based on the determined layout of the main metal patterns and the determined number of interconnection layers.