公开(公告)号：US20240210925A1

公开(公告)日：2024-06-27

申请号：US18530692

申请日：2023-12-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Jin JI ,  Kaeweon YOU ,  Jiung LEE ,  Seok Hyun HONG

IPC: G05B19/418

CPC classification number: G05B19/41865 ,  G05B2219/45031

Abstract: A method including generating sequence data based on measured values of respective one or more process factors of each of a plurality of processes of a semiconductor fabrication process for a wafer within the semiconductor fabrication process, generating a temporary quality index of the wafer using a second neural network connected to a first neural network that is provided the sequence data, training the first neural network and the second neural network based on a loss between the temporary quality index and a set actual quality index of the wafer, selecting a control process from among the plurality of processes using at least one of the trained first neural network and/or the trained second neural network, and selecting a control factor from among multiple process factors of the selected process using the trained second neural network.