公开(公告)号：US20240235903A9

公开(公告)日：2024-07-11

申请号：US18237638

申请日：2023-08-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungho RYU ,  Hyunwook LIM ,  Beomcheol KIM ,  Jung-Pil LIM

IPC: H04L25/03

CPC classification number: H04L25/03267 ,  H04L25/03878

Abstract: A receiver includes a first equalizer that receives an input data signal through a communication channel and equalizes the input data signal based on a first control code to generate a first equalization signal, a second equalizer that equalizes the first equalization signal based on a clock signal and a second control code to generate a second equalization signal, a clock data recovery circuit that restores the clock signal based on the second equalization signal, deserializes the second equalization signal, and outputs a deserialized second equalization signal, and a controller that adjusts the first control code and the second control code based on the deserialized second equalization signal.

公开(公告)号：US20240137251A1

公开(公告)日：2024-04-25

申请号：US18237638

申请日：2023-08-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungho RYU ,  Hyunwook LIM ,  Beomcheol KIM ,  Jung-Pil LIM

IPC: H04L25/03

CPC classification number: H04L25/03267 ,  H04L25/03878

Abstract: A receiver includes a first equalizer that receives an input data signal through a communication channel and equalizes the input data signal based on a first control code to generate a first equalization signal, a second equalizer that equalizes the first equalization signal based on a clock signal and a second control code to generate a second equalization signal, a clock data recovery circuit that restores the clock signal based on the second equalization signal, deserializes the second equalization signal, and outputs a deserialized second equalization signal, and a controller that adjusts the first control code and the second control code based on the deserialized second equalization signal.