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公开(公告)号：US10754790B2
公开(公告)日：2020-08-25
申请号：US15964061
申请日：2018-04-26
Applicant: QUALCOMM Incorporated
Inventor： Jason Norman , Piyush Patel , Rakesh Anigundi , Sadayan Ghows Ghani Sadayan Ebramsah Mo Abdul
IPC: G06F12/1027
Abstract: A memory management unit (MMU) is disclosed. The MMU is configured to receive a translation request from a processing system, wherein the translation request specifies a virtual address to be translated, search a page table stored in a physical memory system for a page table entry that specifies the virtual address, receive a translation lookaside buffer invalidation (TLBI) signal from the processing system, wherein the TLBI signal specifies the virtual address, in response to receiving the TLBI signal specifying the virtual address, invalidate a translation lookaside buffer (TLB) entry in a TLB, wherein the invalidated TLB entry specifies the virtual address and restart the search of the page table for the page table entry that specifies the virtual address.
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公开(公告)号：US20190286718A1
公开(公告)日：2019-09-19
申请号：US15922854
申请日：2018-03-15
Applicant: QUALCOMM Incorporated
IPC: G06F17/30
Abstract: A method is provided that includes obtaining a data structure that includes a plurality of bloom filters, each including an array of bits and each associated with a plurality of hash functions that map at least one element of a data set to at least one of the bits of the array. An element of the data set is added to the data structure by determining a currently selected bloom filter, applying the element to each of the associated hash functions to obtain a corresponding plurality of array bit positions, and setting bits of the array of the currently selected bloom filter at each of the plurality of array bit positions to a first logic state. The method also includes rotating the plurality of bloom filters based on a number of bits that are set to the first logic state in the array of the currently selected bloom filter.
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