公开(公告)号：US20170221879A1

公开(公告)日：2017-08-03

申请号：US15353702

申请日：2016-11-16

Applicant: MEDIATEK INC.

Inventor： Chang-Tzu Wang ,  Tzu-Yi Yang

IPC: H01L27/02

CPC classification number: H01L27/0285 ,  H01L27/0288 ,  H01L29/785 ,  H02H9/046

Abstract: An electrostatic discharge (ESD) protection circuit has an ESD detection circuit, an ESD clamp circuit, and a leakage current reduction circuit. The ESD detection circuit generates an ESD trigger signal when an ESD event is detected in a normal mode. The ESD clamp circuit has a first transistor and a second transistor. The first transistor has a first connection terminal coupled to a first power rail, a control terminal, and a second connection terminal. A bias voltage is supplied to the control terminal of the first transistor in the normal mode. The second transistor has a first connection terminal coupled to the second connection terminal of the first transistor, a control terminal, and a second connection terminal coupled to a second power rail. The ESD trigger signal is transmitted to the control terminal of the second transistor. The leakage current reduction circuit provides the bias voltage to the first transistor.