公开(公告)号：US20230022294A1

公开(公告)日：2023-01-26

申请号：US17954878

申请日：2022-09-28

Applicant: Huawei Technologies Co., Ltd.

Inventor： Weichao Huang ,  Long Xiao

IPC: G06F9/48

Abstract: A task scheduler is connected between a central processing unit (CPU) and each hardware accelerator. The task scheduler first obtains a target task (for example, obtains the target task from a memory), and obtains a dependency relationship between the target task and an associated task. When it is determined, based on the dependency relationship, that a first associated task (for example, a prerequisite for executing the target task is that both a task 1 and a task 2 are executed) in the associated task has been executed, it indicates that the target task meets an execution condition, and the task scheduler schedules related hardware accelerators to execute the target task. Based on a dependency relationship between tasks, the task scheduler schedules, through hardware scheduling, each hardware accelerator to execute each task, and delivery of each task is performed through direct hardware access.

公开(公告)号：US20220238486A1

公开(公告)日：2022-07-28

申请号：US17720840

申请日：2022-04-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Weichao Huang ,  Tao Li

IPC: H01L25/065 ,  H01L23/538

Abstract: A device includes an interconnect layer and a plurality of dies disposed on the interconnect layer, where the plurality of dies includes a first die and a second die, where the first die and the second die are interconnected through routing in an edge area, where the edge area is an area outside a bounding box that defines an area on the interconnect layer, and where the bounding box is a peripheral boundary of the plurality of dies on the interconnect layer.