-
公开(公告)号:US20170338274A1
公开(公告)日:2017-11-23
申请号:US15596136
申请日:2017-05-16
Applicant: Heptagon Micro Optics Pte. Ltd.
Inventor: Radoslaw Marcin Gancarz , Daniel Furrer , Miguel Bruno Vaello Paños , Stephan Beer
IPC: H01L27/148 , H01L27/146 , H04N13/02
CPC classification number: H01L27/14831 , G01S7/4863 , G01S7/4915 , G01S17/89 , H01L27/14616 , H01L27/14623 , H04N5/374 , H04N5/3745 , H04N5/378 , H04N13/207 , H04N13/254 , H04N13/271
Abstract: An imaging device, including a monolithic semiconductor integrated circuit substrate, comprises a focal plane array of pixel cells. Each one of the pixel cells includes a gate overlying a region of the substrate operable to convert incident radiation into charge carriers. The pixel also includes a CMOS readout circuit including at least one output transistor in the substrate. The pixel further includes a charge coupled device section on the substrate adjacent the gate, the charge coupled device section including a sense node to receive charge carriers transferred from the region of the substrate beneath the gate. The sense node is coupled to the output transistor. The pixel also includes a reset switch coupled to the sense node. The pixel's charge coupled device section has a buried channel region. The pixel also includes one or more bias enabling switches operable to enable a bias voltage to be applied to the gate. At least one of the reset switch or the one or more bias enabling switches is formed in the buried channel region.
-
2.
公开(公告)号:US20170339361A1
公开(公告)日:2017-11-23
申请号:US15598598
申请日:2017-05-18
Applicant: Heptagon Micro Optics Pte. Ltd.
Inventor: Radoslaw Marcin Gancarz
CPC classification number: G01S17/89 , G01S7/4863 , G01S7/487 , H01L27/14609 , H04N5/33 , H04N5/361
Abstract: An imaging device includes a focal plane array of demodulation pixel cells. Each of the demodulation pixel cells includes a pinned photodiode, demodulation gates operable to demodulate optical signals sensed by the pinned photodiode and to transfer accumulated photo-charges to a respective one of a multitude of sense nodes, a readout circuit operable selectively to read out signals from the sense nodes, and a background light suppression circuit including cross-coupled current mirrors.
-