公开(公告)号：US08896379B2

公开(公告)日：2014-11-25

申请号：US13841512

申请日：2013-03-15

Applicant: Electronics and Telecommunications Research Institute ,  Industry-Academic Cooperation Foundation, Dankook University

Inventor： Yil Suk Yang ,  Jongdae Kim ,  Yong-Seo Koo

IPC: H03F3/45

CPC classification number: H03F3/45192 ,  H03F2203/45244 ,  H03F2203/45508

Abstract: Provided is an error amplifier. The error amplifier includes: an amplifying unit receiving first and second input signals and amplifying a voltage difference between the received first and second input signals; a first voltage generating unit generating first and second driving voltages for driving the amplifying unit; a second voltage generating unit generating first and second body voltages to implement a body biasing method; a cascode current source including first to fourth PMOS transistors to provide a bias current to the amplifying unit and the first voltage generating unit; and an output unit outputting a signal of the voltage difference amplified by the amplifying unit, wherein the first and third PMOS transistors receive the first body voltage through a body terminal and the second and fourth PMOS transistors receive the second body voltage through a body terminal.

Abstract translation: 提供了一个误差放大器。 误差放大器包括：放大单元，接收第一和第二输入信号并放大所接收的第一和第二输入信号之间的电压差; 产生用于驱动放大单元的第一和第二驱动电压的第一电压产生单元; 产生第一和第二体电压以实现身体偏置方法的第二电压产生单元; 共源共栅电流源，包括第一至第四PMOS晶体管，以向放大单元和第一电压产生单元提供偏置电流; 以及输出单元，输出由放大单元放大的电压差的信号，其中第一和第三PMOS晶体管通过主体端子接收第一体电压，并且第二和第四PMOS晶体管通过主体端子接收第二体电压。

公开(公告)号：US10475782B2

公开(公告)日：2019-11-12

申请号：US15713121

申请日：2017-09-22

Applicant: Electronics and Telecommunications Research Institute ,  Industry-Academic Cooperation Foundation, Dankook University

Inventor： Jimin Oh ,  Yong-Seo Koo ,  Yil Suk Yang ,  Jongdae Kim

IPC: H01L27/02 ,  H01L29/74 ,  H01L29/87

Abstract: Provided are an ESD protection diode and an electronic device including the same. An ESD protection diode and an electronic device including the same according to an embodiment of the inventive concept include first to fifth wells. The first well is connected to a first voltage terminal. The second well is connected to a second voltage terminal. The third well is connected to the input/output terminal. The fourth well is disposed between the first well and the third well, and the fifth well is disposed between the second well and the third well. The first to third wells are N-type wells, and the fourth and fifth wells are P-type wells. The first well includes a first N+ diffusion region and the second well includes a second N+ diffusion region. The fourth well includes a first P+ diffusion region and the fifth well includes a second P+ diffusion region. According to an embodiment of the inventive concept, an internal circuit is protected fro an ESD pulse applied to a plurality of terminals and holding voltage is increased.

公开(公告)号：US20140152386A1

公开(公告)日：2014-06-05

申请号：US13841512

申请日：2013-03-15

Applicant: Electronics and Telecommunications Research Institute

Inventor： Yil Suk YANG ,  Jongdae Kim ,  Yong-Seo Koo

IPC: H03F3/45

CPC classification number: H03F3/45192 ,  H03F2203/45244 ,  H03F2203/45508

Abstract: Provided is an error amplifier. The error amplifier includes: an amplifying unit receiving first and second input signals and amplifying a voltage difference between the received first and second input signals; a first voltage generating unit generating first and second driving voltages for driving the amplifying unit; a second voltage generating unit generating first and second body voltages to implement a body biasing method; a cascode current source including first to fourth PMOS transistors to provide a bias current to the amplifying unit and the first voltage generating unit; and an output unit outputting a signal of the voltage difference amplified by the amplifying unit, wherein the first and third PMOS transistors receive the first body voltage through a body terminal and the second and fourth PMOS transistors receive the second body voltage through a body terminal.

Abstract translation: 提供了一个误差放大器。 误差放大器包括：放大单元，接收第一和第二输入信号并放大所接收的第一和第二输入信号之间的电压差; 产生用于驱动放大单元的第一和第二驱动电压的第一电压产生单元; 产生第一和第二体电压以实现身体偏置方法的第二电压产生单元; 共源共栅电流源，包括第一至第四PMOS晶体管，以向放大单元和第一电压产生单元提供偏置电流; 以及输出单元，输出由放大单元放大的电压差的信号，其中第一和第三PMOS晶体管通过主体端子接收第一体电压，并且第二和第四PMOS晶体管通过主体端子接收第二体电压。