公开(公告)号：US20190028266A1

公开(公告)日：2019-01-24

申请号：US15657159

申请日：2017-07-23

Applicant: Cisco Technology, Inc.

Inventor： David DARMON ,  Avi Klein ,  Yaacov Belenky

IPC: H04L9/06 ,  H04L9/08

Abstract: In one embodiment, a system and method is described for dynamic encryption of CPU registers. A data item, encrypted according to a first key is stored in one register in a CPU register file. A second data item is encrypted according to a second key, and is written to another of the registers. A flag, associated with each of the registers, is stored, indicating whether the data item is encrypted according to the first or second key. One of the data items is decrypted by retrieving its associated flag, thereby determining according to which key the data item is encrypted. Thereupon, the data item is decrypted according to the determined key. The keys are updated by a controller once each of the flags are set. The controller changes the second key to be the first key, stores a new second key, and clears each of the flags. Related apparatus, systems and methods are also described.

公开(公告)号：US20180247902A1

公开(公告)日：2018-08-30

申请号：US15640615

申请日：2017-07-03

Applicant: Cisco Technology, Inc.

Inventor： David DARMON ,  Avi Klein ,  Yehuda Salmon ,  Aharon Grabovsky ,  Ruben Attia

IPC: H01L23/00 ,  G06F17/50

CPC classification number: H01L23/576 ,  G06F17/5036 ,  G06F17/505 ,  G06F17/5068 ,  G06F2217/84

Abstract: In one embodiment, a chip comprising a circuit, the circuit comprising a plurality of components, wherein the circuit is adapted to perform a function that is dependent on timing behavior of the circuit, and wherein a geometry of a layout of the circuit is substantially the same as another geometry of another layout of another circuit adapted to perform another function that is dependent on different timing behavior.