Scheme for Transferring and Authenticating Data

    公开(公告)号:US20240396731A1

    公开(公告)日:2024-11-28

    申请号:US18670151

    申请日:2024-05-21

    Applicant: Apple Inc.

    Abstract: Various techniques related to authenticating and verifying the integrity of data received by a computer system from an external source (such as a sensor) are disclosed. Hardware circuits are disclosed that, along with the computer processor, allow for error-checking and authentication of data received by the computer system. For instance, the hardware circuits may generate a separate authentication code that can be compared to the authentication code in the data itself to determine whether or not the message is authentic and whether or not there is an error in the data. The disclosed techniques reduce the processing requirements of a computer system and can be implemented using simple hardware circuit designs.

    Secure Communication in a Computing System

    公开(公告)号:US20230093992A1

    公开(公告)日:2023-03-30

    申请号:US17934642

    申请日:2022-09-23

    Applicant: Apple Inc.

    Abstract: Securely communicating traffic between control units interconnected by a network. An electronic control unit (ECU) receives a signed manifest identifying public keys for a group of ECUs authorized to communicate over the network. The ECU performs an authentication exchange with the ECUs in the group. The authentication exchange uses public keys identified in the manifest. Based on the authentication exchange, the ECU distributes a group key to authenticated ones of the ECUs that communicate messages authenticated using the group key.

    Scheme for transferring and authenticating data

    公开(公告)号:US12015710B2

    公开(公告)日:2024-06-18

    申请号:US17374456

    申请日:2021-07-13

    Applicant: Apple Inc.

    CPC classification number: H04L9/32

    Abstract: Various techniques related to authenticating and verifying the integrity of data received by a computer system from an external source (such as a sensor) are disclosed. Hardware circuits are disclosed that, along with the computer processor, allow for error-checking and authentication of data received by the computer system. For instance, the hardware circuits may generate a separate authentication code that can be compared to the authentication code in the data itself to determine whether or not the message is authentic and whether or not there is an error in the data. The disclosed techniques reduce the processing requirements of a computer system and can be implemented using simple hardware circuit designs.

    NETWORK TIMING SYNCHRONIZATION
    4.
    发明申请

    公开(公告)号:US20230028255A1

    公开(公告)日:2023-01-26

    申请号:US17937659

    申请日:2022-10-03

    Applicant: Apple Inc.

    Abstract: Techniques are disclosed relating to time synchronization in a network. In some embodiments, an apparatus includes a first circuit having a first clock configured to maintain a local time value for a node coupled to a network. The first circuit is configured to send a first message to a second circuit. The first message includes a first nonce. The second circuit has a second clock that maintains a reference time value for the network. The first circuit receives a second message from the second circuit, the second message including a second nonce and is associated with a timestamp identifying the reference time value. The first circuit compares the first nonce to the second nonce to determine whether the timestamp is valid and, in response to determining that the timestamp is valid, uses the timestamp to synchronize the first clock with the second clock.

    Scheme for Transferring and Authenticating Data

    公开(公告)号:US20230019372A1

    公开(公告)日:2023-01-19

    申请号:US17374456

    申请日:2021-07-13

    Applicant: Apple Inc.

    Abstract: Various techniques related to authenticating and verifying the integrity of data received by a computer system from an external source (such as a sensor) are disclosed. Hardware circuits are disclosed that, along with the computer processor, allow for error-checking and authentication of data received by the computer system. For instance, the hardware circuits may generate a separate authentication code that can be compared to the authentication code in the data itself to determine whether or not the message is authentic and whether or not there is an error in the data. The disclosed techniques reduce the processing requirements of a computer system and can be implemented using simple hardware circuit designs.

    Network timing synchronization
    7.
    发明授权

    公开(公告)号:US12155760B2

    公开(公告)日:2024-11-26

    申请号:US17937659

    申请日:2022-10-03

    Applicant: Apple Inc.

    Abstract: Techniques are disclosed relating to time synchronization in a network. In some embodiments, an apparatus includes a first circuit having a first clock configured to maintain a local time value for a node coupled to a network. The first circuit is configured to send a first message to a second circuit. The first message includes a first nonce. The second circuit has a second clock that maintains a reference time value for the network. The first circuit receives a second message from the second circuit, the second message including a second nonce and is associated with a timestamp identifying the reference time value. The first circuit compares the first nonce to the second nonce to determine whether the timestamp is valid and, in response to determining that the timestamp is valid, uses the timestamp to synchronize the first clock with the second clock.

    Network timing synchronization
    8.
    发明授权

    公开(公告)号:US11463253B2

    公开(公告)日:2022-10-04

    申请号:US16329743

    申请日:2017-09-08

    Applicant: Apple Inc.

    Abstract: Techniques are disclosed relating to time synchronization in a network. In some embodiments, an apparatus includes a first circuit having a first clock configured to maintain a local time value for a node coupled to a network. The first circuit is configured to send a first message to a second circuit. The first message includes a first nonce. The second circuit has a second clock that maintains a reference time value for the network. The first circuit receives a second message from the second circuit, the second message including a second nonce and is associated with a timestamp identifying the reference time value. The first circuit compares the first nonce to the second nonce to determine whether the timestamp is valid and, in response to determining that the timestamp is valid, uses the timestamp to synchronize the first clock with the second clock.

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