Low power display on mode for a display device

    公开(公告)号:US10262622B2

    公开(公告)日:2019-04-16

    申请号:US15260580

    申请日:2016-09-09

    Applicant: Apple Inc.

    Abstract: This application relates to systems, methods, and apparatus for transitioning a display device between operating modes using a single dedicated pin of a circuit connected to the display device. The dedicated pin can receive a packet signal corresponding to an operating mode for the display device, and the circuit can thereafter cause the display device to transition into the desired operating mode in response to receiving the packet signal. The operating mode can be a low power on mode where an interface connected to the circuit is deactivated and at least some circuitry of the display device is throttled or powered off. The display device can be driven in an all black state while in the low power on mode, thereby allowing the display device to more quickly transition out of the low power on mode compared to when the display device is completely off.

    TESTING OF INTEGRATED CIRCUIT TO SUBSTRATE JOINTS
    2.
    发明申请
    TESTING OF INTEGRATED CIRCUIT TO SUBSTRATE JOINTS 有权
    集成电路测试接地

    公开(公告)号:US20140125645A1

    公开(公告)日:2014-05-08

    申请号:US13710884

    申请日:2012-12-11

    Applicant: APPLE INC.

    CPC classification number: G09G3/006

    Abstract: A method for testing integrated circuit-to-substrate joints that electrically connect an IC to a substrate. An ammeter is coupled to a test node of the driver IC, while the test node is coupled to a current source, and a measured current output of the ammeter is recorded. A voltmeter is coupled to the test node while the test node is coupled to an end node of a group of dummy IC-to-substrate joints that are daisy chained; a first measured voltage output of the voltmeter is then recorded. The IC then couples the test node to another end node of the daisy chained dummy joints, and a second measured voltage output is recorded. A resistance or admittance value for the electrical connection of the IC to the substrate is then computed, using the first and second measured voltage outputs and the measured current output. Other embodiments are also described and claimed.

    Abstract translation: 一种用于测试将IC电连接到衬底的集成电路到衬底接头的方法。 电流表耦合到驱动器IC的测试节点,而测试节点耦合到电流源,并记录电流表的测量电流输出。 电压表耦合到测试节点,而测试节点耦合到菊花链的一组虚拟IC到衬底接头的端节点; 然后记录电压表的第一测量电压输出。 然后,IC将测试节点耦合到菊花链虚拟接头的另一端节点,并记录第二测量电压输出。 然后使用第一和第二测量电压输出和测量的电流输出来计算IC与衬底的电连接的电阻或导纳值。 还描述和要求保护其他实施例。

    Low power display on mode for a display device

    公开(公告)号:US10943557B2

    公开(公告)日:2021-03-09

    申请号:US16384716

    申请日:2019-04-15

    Applicant: Apple Inc.

    Abstract: Systems, methods, and apparatus to transition a display device between operating modes using a single dedicated pin of a circuit connected to the display device. The dedicated pin can receive a packet signal corresponding to an operating mode for the display device, and the circuit can thereafter cause the display device to transition into the desired operating mode in response to receiving the packet signal. The operating mode can be a low power on mode where an interface connected to the circuit is deactivated and at least some circuitry of the display device is throttled or powered off. The display device can be driven in an all black state while in the low power on mode, thereby allowing the display device to more quickly transition out of the low power on mode compared to when the display device is completely off.

    Testing of integrated circuit to substrate joints
    4.
    发明授权
    Testing of integrated circuit to substrate joints 有权
    集成电路到基板接头的测试

    公开(公告)号:US09472131B2

    公开(公告)日:2016-10-18

    申请号:US13710884

    申请日:2012-12-11

    Applicant: Apple Inc.

    CPC classification number: G09G3/006

    Abstract: A method for testing integrated circuit-to-substrate joints that electrically connect an IC to a substrate. An ammeter is coupled to a test node of the driver IC, while the test node is coupled to a current source, and a measured current output of the ammeter is recorded. A voltmeter is coupled to the test node while the test node is coupled to an end node of a group of dummy IC-to-substrate joints that are daisy chained; a first measured voltage output of the voltmeter is then recorded. The IC then couples the test node to another end node of the daisy chained dummy joints, and a second measured voltage output is recorded. A resistance or admittance value for the electrical connection of the IC to the substrate is then computed, using the first and second measured voltage outputs and the measured current output. Other embodiments are also described and claimed.

    Abstract translation: 一种用于测试将IC电连接到衬底的集成电路到衬底接头的方法。 电流表耦合到驱动器IC的测试节点,而测试节点耦合到电流源,并记录电流表的测量电流输出。 电压表耦合到测试节点,而测试节点耦合到菊花链的一组虚拟IC到衬底接头的端节点; 然后记录电压表的第一测量电压输出。 然后,IC将测试节点耦合到菊花链虚拟接头的另一端节点,并记录第二测量电压输出。 然后使用第一和第二测量电压输出和测量的电流输出来计算IC与衬底的电连接的电阻或导纳值。 还描述和要求保护其他实施例。

    Systems and methods for monitoring LCD display panel resistance
    5.
    发明授权
    Systems and methods for monitoring LCD display panel resistance 有权
    监控LCD显示面板电阻的系统和方法

    公开(公告)号:US09201549B2

    公开(公告)日:2015-12-01

    申请号:US13679793

    申请日:2012-11-16

    Applicant: APPLE INC.

    CPC classification number: G06F3/044 G06F3/0412 G06F3/0416 G09G3/36

    Abstract: Systems and methods for monitoring internal resistance of a display may include supplying the display via a capacitor with a first voltage and a second voltage configured to enable the display to receive touch inputs and display image data, respectively. The method may discharge the capacitor at least three times via a first resistor, a second resistor, and the first resistor and second resistor coupled in parallel with each other. The method may monitor three discharge waveforms that corresponds to when the capacitor discharges from the first voltage to the second voltage via the first resistor, the second resistor, and the first resistor and second resistor coupled in parallel with each other. Based at least in part on the discharge waveforms, the method may determine a chip on glass resistance value and a flex on glass resistance value that correspond to an internal resistance of the display.

    Abstract translation: 用于监视显示器的内部电阻的系统和方法可以包括经由电容器向显示器提供第一电压和第二电压,第二电压被配置为使得显示器能够分别接收触摸输入和显示图像数据。 该方法可以经由第一电阻器,第二电阻器以及彼此并联耦合的第一电阻器和第二电阻器至少三次放电电容器。 该方法可以监视对应于电容器通过第一电阻器,第二电阻器以及第一电阻器和第二电阻器彼此并联耦合而从第一电压放电到第二电压的三个放电波形。 至少部分地基于放电波形,该方法可以确定对应于显示器的内部电阻的玻璃电阻值的芯片和玻璃电阻值的弯曲。

    LOW POWER DISPLAY ON MODE FOR A DISPLAY DEVICE

    公开(公告)号:US20190340998A1

    公开(公告)日:2019-11-07

    申请号:US16384716

    申请日:2019-04-15

    Applicant: Apple Inc.

    Abstract: Systems, methods, and apparatus to transition a display device between operating modes using a single dedicated pin of a circuit connected to the display device. The dedicated pin can receive a packet signal corresponding to an operating mode for the display device, and the circuit can thereafter cause the display device to transition into the desired operating mode in response to receiving the packet signal. The operating mode can be a low power on mode where an interface connected to the circuit is deactivated and at least some circuitry of the display device is throttled or powered off. The display device can be driven in an all black state while in the low power on mode, thereby allowing the display device to more quickly transition out of the low power on mode compared to when the display device is completely off.

    Voltage discharge optimization
    7.
    发明授权
    Voltage discharge optimization 有权
    电压放电优化

    公开(公告)号:US08803593B2

    公开(公告)日:2014-08-12

    申请号:US13632078

    申请日:2012-09-30

    Applicant: Apple Inc.

    CPC classification number: G05F1/613

    Abstract: One embodiment of an apparatus to control and sense a voltage through a single node can include a comparator to monitor single node voltage, a transistor to discharge voltage through the single node and control logic. The control logic can have at least two operational phases when actively controlling the voltage through the single node. In a first phase, the control logic can configure the comparator to determine if the single node voltage is greater than a reference voltage. In a second phase, the control logic can configure the transistor to discharge voltage through the single node when the comparator has previously indicated that the single node voltage is greater than a reference voltage. The control logic can alternatively execute first and second phases to discharge the voltage to a predetermined level.

    Abstract translation: 用于控制和感测通过单个节点的电压的装置的一个实施例可包括监视单节点电压的比较器,通过单个节点放电电压的晶体管和控制逻辑。 当通过单个节点主动控制电压时,控制逻辑可以具有至少两个操作阶段。 在第一阶段中,控制逻辑可以配置比较器以确定单个节点电压是否大于参考电压。 在第二阶段中,当比较器先前已经指示单个节点电压大于参考电压时,控制逻辑可以配置晶体管以通过单个节点放电电压。 控制逻辑可替代地执行第一和第二阶段以将电压放电至预定水平。

    SYSTEMS AND METHODS FOR MONITORING LCD DISPLAY PANEL RESISTANCE
    8.
    发明申请
    SYSTEMS AND METHODS FOR MONITORING LCD DISPLAY PANEL RESISTANCE 有权
    监控液晶显示面板电阻的系统和方法

    公开(公告)号:US20140062940A1

    公开(公告)日:2014-03-06

    申请号:US13679793

    申请日:2012-11-16

    Applicant: APPLE INC.

    CPC classification number: G06F3/044 G06F3/0412 G06F3/0416 G09G3/36

    Abstract: Systems and methods for monitoring internal resistance of a display may include supplying the display via a capacitor with a first voltage and a second voltage configured to enable the display to receive touch inputs and display image data, respectively. The method may discharge the capacitor at least three times via a first resistor, a second resistor, and the first resistor and second resistor coupled in parallel with each other. The method may monitor three discharge waveforms that corresponds to when the capacitor discharges from the first voltage to the second voltage via the first resistor, the second resistor, and the first resistor and second resistor coupled in parallel with each other. Based at least in part on the discharge waveforms, the method may determine a chip on glass resistance value and a flex on glass resistance value that correspond to an internal resistance of the display.

    Abstract translation: 用于监视显示器的内部电阻的系统和方法可以包括经由电容器向显示器提供第一电压和第二电压,第二电压被配置为使得显示器能够分别接收触摸输入和显示图像数据。 该方法可以经由第一电阻器,第二电阻器以及彼此并联耦合的第一电阻器和第二电阻器至少三次放电电容器。 该方法可以监视对应于电容器通过第一电阻器,第二电阻器以及第一电阻器和第二电阻器彼此并联耦合而从第一电压放电到第二电压的三个放电波形。 至少部分地基于放电波形,该方法可以确定对应于显示器的内部电阻的玻璃电阻值的芯片和玻璃电阻值的弯曲。

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