公开(公告)号：US20070040565A1

公开(公告)日：2007-02-22

申请号：US11207336

申请日：2005-08-19

Applicant: Jayasanker Jayabalan ,  Mihai Rotaru ,  Mahadevan Iyer ,  Andrew Ong

Inventor： Jayasanker Jayabalan ,  Mihai Rotaru ,  Mahadevan Iyer ,  Andrew Ong

IPC: G01R31/26

CPC classification number: G01R31/2831 ,  G01R31/2889 ,  H01L2224/16 ,  Y10T29/49004

Abstract: A compliant interposer sheet probe card and a method for testing a wafer or a wafer level package using the probe card are described. Test electronic circuits are connected on one side of a multi-layer substrate. A top side of a compliant interposer sheet is connected to an opposite side of the multi-layer substrate. A wafer or a wafer level package to be tested is contacted with pins on a bottom side of the compliant interposer sheet whereby the wafer or wafer level package can be tested.

Abstract translation: 描述了兼容插入片材探针卡和用于使用探针卡测试晶片或晶片级封装的方法。 测试电子电路连接在多层基板的一侧。 柔性插入片的顶侧连接到多层基板的相对侧。 要测试的晶片或晶片级封装与柔性插入片的底侧上的引脚接触，由此可以测试晶片或晶片级封装。