- 专利标题： Structure and method of fabricating three-dimensional (3D) metal-insulator-metal (MIM) capacitor and resistor in semi-additive plating metal wiring
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申请号： US15288594申请日： 2016-10-07
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公开(公告)号： US09954051B2公开(公告)日： 2018-04-24
- 发明人: Guan Huei See , Chin Hock Toh , Glen T. Mori , Arvind Sundarrajan
- 申请人： Guan Huei See , Chin Hock Toh , Glen T. Mori , Arvind Sundarrajan
- 申请人地址： US CA Santa Clara
- 专利权人： APPLIED MATERIALS, INC.
- 当前专利权人： APPLIED MATERIALS, INC.
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Moser Taboada
- 代理商 Alan Taboada
- 主分类号： H01L21/768
- IPC分类号： H01L21/768 ; H01L21/02 ; H01L23/522 ; H01L23/532 ; H01L49/02 ; H01L21/311 ; H01L21/3213
摘要：
Methods of processing a substrate include: providing a substrate having a polymer dielectric layer, a metal pad formed within the polymer dielectric layer and a first metal layer formed atop the polymer dielectric layer; depositing a polymer layer atop the substrate; patterning the polymer layer to form a plurality of openings, wherein the plurality of openings comprises a first opening formed proximate the metal pad; depositing a first barrier layer atop the polymer layer; depositing a dielectric layer atop the first barrier layer; etching the dielectric layer and the first barrier layer from within the first opening and a field region of the polymer layer; depositing a second barrier layer atop the substrate; depositing a second metal layer atop the substrate wherein the second metal layer fills the plurality of openings; and etching the second metal layer from a portion of the field region of the polymer layer.
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