- Patent Title: Semiconductor chip scale package and manufacturing method thereof
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Application No.: US13934982Application Date: 2013-07-03
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Publication No.: US09941240B2Publication Date: 2018-04-10
- Inventor: Ming-Kai Liu , Chun-Lin Lu , Kai-Chiang Wu , Shih-Wei Liang , Ching-Feng Yang , Yen-Ping Wang , Chia-Chun Miao
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A surface mounting semiconductor component includes a semiconductor device, a circuit board, a number of first solder bumps, and a number of second solder bumps. The semiconductor device included a number of die pads. The circuit board includes a number of contact pads. The first solder bumps are configured to bond the semiconductor device and the circuit board. Each of the first solder bumps connects at least two die pads with a corresponding contact pad. Each of the second solder bumps connects a die pad with a corresponding contact pad. A method of forming a surface mounting component or a chip scale package assembly wherein the component or assembly has at least two different types of solder bumps.
Public/Granted literature
- US20150008575A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2015-01-08
Information query
IPC分类: