Upon a first transition from a first state to a second state, a first bit in a memory unit comprising a plurality of bits is programmed. Upon a first transition from the second state to the first state, a second bit in the memory unit is programmed, the second bit being before the first bit in the sequence of the plurality of bits. Upon a second transition from the first state to the second state, a third bit in the memory unit is programmed, the third bit being subsequent to the first bit by at least two bits in the sequence of the plurality of bits. Upon a second transition from the second state to the first state, a fourth bit in the memory unit is programmed, the fourth bit being before the third bit in the sequence of the plurality of bits.