- 专利标题: System and method for full-duplex MAC timing modifications
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申请号: US15410468申请日: 2017-01-19
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公开(公告)号: US09819476B2公开(公告)日: 2017-11-14
- 发明人: Vaneet Aggarwal , Rittwik Jana , Christopher W. Rice , Nemmara K. Shankaranarayanan
- 申请人: AT&T Intellectual Property I, L.P.
- 申请人地址: US GA Atlanta
- 专利权人: AT&T Intellectual Property I, L.P.
- 当前专利权人: AT&T Intellectual Property I, L.P.
- 当前专利权人地址: US GA Atlanta
- 主分类号: H04B7/005
- IPC分类号: H04B7/005 ; H04L5/14 ; H04W74/08 ; H04W72/04 ; H04W84/12
摘要:
A system, method, and computer-readable storage media for reducing monopolization of a frequency channel during full-duplex communications. The MAC layer of governing communications can be modified to reduce likelihood of monopolization by (1) in networks which are exclusively filled with full-duplex devices, configuring non-communicating devices to ignore data collisions of communicating devices, requiring the communicating devices to wait for an standard backoff time after the data transmission is complete; and/or (2) in mixed half-duplex/full-duplex networks, requiring a half-duplex nodes and/or a full-duplex node to wait an extended duration after the data transmission is complete, while the non-communicating devices do not wait an extended duration.
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