- 专利标题: Techniques for handling errors in persistent memory
-
申请号: US14319387申请日: 2014-06-30
-
公开(公告)号: US09753793B2公开(公告)日: 2017-09-05
- 发明人: Mohan J. Kumar , Murugasamy K. Nachimuthu , Camille C. Raad
- 申请人: INTEL CORPORATION
- 申请人地址: US CA Santa Clara
- 专利权人: INTEL CORPORATION
- 当前专利权人: INTEL CORPORATION
- 当前专利权人地址: US CA Santa Clara
- 主分类号: G06F11/07
- IPC分类号: G06F11/07 ; G09C1/00 ; G11C29/52 ; G11C5/04 ; G11C29/04
摘要:
Examples may include a basic input/output system (BIOS) for a computing platform communicating with a controller for a non-volatile dual in-line memory module (NVDIMM). Communication between the BIOS and the controller may include a request for the controller to scan and identify error locations in non-volatile memory at the NVDIMM. The non-volatile memory may be capable of providing persistent memory for the NVDIMM.
公开/授权文献
- US20150378808A1 Techniques for Handling Errors in Persistent Memory 公开/授权日:2015-12-31
信息查询