Invention Grant
- Patent Title: Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme
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Application No.: US15058309Application Date: 2016-03-02
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Publication No.: US09721842B2Publication Date: 2017-08-01
- Inventor: Takashi Ando , Hemanth Jagannathan , Balaji Kannan , Siddarth A. Krishnan , Unoh Kwon , Rekha Rajaram
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent L. Jeffrey Kelly
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/8234 ; H01L21/3213 ; H01L21/28 ; H01L21/321 ; H01L21/033 ; H01L21/225 ; H01L21/311 ; H01L21/3115 ; H01L21/324 ; H01L29/66 ; H01L29/49 ; H01L21/8238 ; H01L21/027 ; H01L21/02 ; H01L29/51

Abstract:
A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly or indirectly by using layers composed of multi-layer thin film stacks, or in other embodiments, by a single blocking layer. By taking advantage of unexpected etch selectivity of the multi-layer stack or the controlled etch process of a single layer stack, etch damage to the high-k may be avoided and work function metal thicknesses can be tightly controlled which in turn allows field effect transistors with low Tinv (inverse of gate capacitance) mismatch.
Public/Granted literature
- US20160190015A1 METHOD OF PATTERNING DOPANT FILMS IN HIGH-K DIELECTRICS IN A SOFT MASK INTEGRATION SCHEME Public/Granted day:2016-06-30
Information query
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