The present invention is suitable to the field of electronic technology, and provides a method of manufacturing a thin film transistor and a pixel unit thereof, wherein when the thin film transistor is manufactured, the gate metal layer is used as a mask, and exposed from the back of the substrate to position the channel and the source and drain of the thin film transistor, so that the channel is self-aligned with the gate, and the source and drain are self-aligned with the gate and are symmetrical, and the thin film transistor thus manufactured has a small parasitic capacitance, and the circuit manufactured therewith is fast in operation, and less prone to occurring short circuit or open circuit. In the present invention, the characteristics that the channel is self-aligned with the gate, and the source and drain are self-aligned with the gate and are symmetrical avoid the alignment precision requirement on the mask plate in the production, thus reducing the need for the high precision lithographic apparatus, and reducing the costs and increasing the yield. In addition, the present process is suitable for manufacturing a pixel unit of a thin film transistor, the manufacturing process only requires four mask sets which do not require the critical alignment. As compared with other four mask processes which use the gray tone masks, the present process can increase the yield and reduce the costs.