Apparatus and methods for scalable photonic packet architectures using PIC switches
Abstract:
Embodiments are provided for scalable photonic packet fabric architectures using photonic integrated circuit switches. The architectures use compact size silicon photonic circuits that can be arranged in a combined centralized and distributed manner. In an embodiment, an optical switch structure comprises a plurality of core photonic based switches and a plurality of photonic interface units (PIUs) optically coupled to the core photonic based switches and to a plurality of groups of top-of-rack switches (TORs). Each PIU comprises a N×N silicon photonic (SiP) switch optically coupled to a group of TORs associated with the PIU from the groups of TORs, where N is a number of the TORs in each group. The PIU also comprises a plurality of 1×P SiP switches coupled to the group of TORs associated with the PIU and to the core photonic based switches, where P is a number of the core photonic based switches.
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