Invention Grant
- Patent Title: Si recess method in HKMG replacement gate technology
- Patent Title (中): HKMG替代门技术的Si凹槽法
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Application No.: US14210796Application Date: 2014-03-14
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Publication No.: US09583591B2Publication Date: 2017-02-28
- Inventor: Harry-Hak-Lay Chuang , Wei Cheng Wu , Chin-Yi Huang , Shih-Chang Liu , Chang-Ming Wu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L21/77
- IPC: H01L21/77 ; H01L21/336 ; H01L29/66 ; H01L27/115

Abstract:
The present disclosure relates to a method of embedding an ESF3 memory in a HKMG integrated circuit that utilizes a replacement gate technology. The ESF3 memory is formed over a recessed substrate which prevents damage of the memory control gates during the CMP process performed on the ILD layer. An asymmetric isolation zone is also formed in the transition region between the memory cell and the periphery circuit boundary.
Public/Granted literature
- US20150263010A1 Si RECESS METHOD IN HKMG REPLACEMENT GATE TECHNOLOGY Public/Granted day:2015-09-17
Information query
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