A gate driver and a display device having the same are disclosed. In one aspect, the gate driver includes a plurality of stages configured to respectively output a plurality of gate output signals. An N-th stage includes a first input circuit configured to boost a first input signal to a first signal and transmit the first input signal to a first node. A second input circuit is configured to boost the first input signal to a second signal and transmit the fifth clock signal and a first direct current (DC) voltage to a second node. A stabilizing circuit is configured to boost a second input signal to a third signal, boost a second node signal to a fourth signal, and stabilize a first node signal. An initializing circuit is configured to initialize voltages at the first and second nodes and the first to fourth signals.