The invention concerns a bandwidth control method in an on-chip system comprising at least one main master module, at least one secondary master module, at least one slave module and a bus connected to each module on a communication link, the bus comprising interconnection means to make at least one common slave module communicate with at least one main master module and with at least one secondary master module via at least one common path portion, the method comprising the following steps carried out for each common slave module: first detection of a first request to access the common slave module, issued by a main master module, definition of a blocking time Dj associated with the common slave module, blocking, during blocking time Dj, of any data transfer on the at least one common path portion between a secondary master module and the common slave module.