Invention Grant
US09431413B2 STI recess method to embed NVM memory in HKMG replacement gate technology 有权
STI凹槽方法将NVM内存嵌入HKMG替换门技术

STI recess method to embed NVM memory in HKMG replacement gate technology
Abstract:
The present disclosure relates to a structure and method for reducing contact over-etching and high contact resistance (Rc) on an embedded flash memory HKMG integrated circuit. In one embodiment, an STI region underlying a memory contact pad region is recessed to make the STI surface substantially co-planar with the rest of the semiconductor substrate. The recess allows formation of thicker memory contact pad structures. The thicker polysilicon on these contact pad structures prevents contact over-etching and thus reduces the Rc of contacts formed thereon.
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