Some implementations provide a semiconductor device (e.g., die, wafer) that includes a substrate, metal layers and dielectric layers coupled to the substrate, a pad coupled to one of the several metal layers, a first metal redistribution layer coupled to the pad, an under bump metallization (UBM) layer coupled to the first metal redistribution layer. The semiconductor device includes several crack stopping structures configured to surround a bump area of the semiconductor device and a pad area of the semiconductor device. The bump area includes the UBM layer. The pad area includes the pad. In some implementations, at least one crack stopping structure includes a first metal layer and a first via. In some implementations, at least one crack stopping structure further includes a second metal layer, a second via, and a third metal layer. In some implementations, at least one crack stopping structure is an inverted pyramid crack stopping structure.