Invention Grant
- Patent Title: Semiconductor device including output circuit constituted of plural unit buffer circuits in which impedance thereof are adjustable
- Patent Title (中): 包括由其阻抗可调的多个单位缓冲电路构成的输出电路的半导体装置
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Application No.: US14295213Application Date: 2014-06-03
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Publication No.: US09368189B2Publication Date: 2016-06-14
- Inventor: Hideyuki Yokou , Koji Uemura , Manabu Ishimatsu
- Applicant: PS4 Luxco S.a.r.l.
- Applicant Address: LU Luxembourg
- Assignee: PS4 LUXCO S.A.R.L.
- Current Assignee: PS4 LUXCO S.A.R.L.
- Current Assignee Address: LU Luxembourg
- Agency: Kunzler Law Group, PC
- Priority: JP2011-223741 20111011
- Main IPC: H03K19/003
- IPC: H03K19/003 ; G11C11/4076 ; H03K17/16 ; H03K19/00 ; G11C11/4093 ; G11C5/14 ; G11C29/02 ; H03K19/0185

Abstract:
A semiconductor device includes an output circuit having a plurality of unit buffer circuits, an impedance of each unit buffer circuit of the plurality of unit buffer circuits being adjustable, a control circuit configured to selectively activate one or more unit buffer circuits of the plurality of unit buffer circuits, and an impedance adjustment unit configured to adjust the impedance of each of the unit buffer circuits of the plurality of unit buffer circuits. The impedance adjustment unit includes a first power line, a replica circuit, and a load current generation circuit. The replica circuit and the load current generation circuit are coupled in common to the first power line, the replica circuit has a replica impedance that is substantially equal to the impedance of the output circuit, and the load current generation circuit changes current flowing therethrough.
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